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`timescale 1 ps / 1 ps
module pfr_sys_mm_interconnect_0 (
		input  wire        u_i3c_clk_out_clk_clk,                                            //                                          u_i3c_clk_out_clk.clk
		input  wire        u_spi_clk_out_clk_clk,                                            //                                          u_spi_clk_out_clk.clk
		input  wire        u_sys_clk_out_clk_clk,                                            //                                          u_sys_clk_out_clk.clk
		input  wire        dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset,          //          dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset.reset
		input  wire        u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset,              //              u_i3c_avmm_bridge_reset_reset_bridge_in_reset.reset
		input  wire        u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset, // u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset.reset
		input  wire [20:0] dma_ufm_avmm_bridge_0_avmm_address,                               //                                 dma_ufm_avmm_bridge_0_avmm.address
		output wire        dma_ufm_avmm_bridge_0_avmm_waitrequest,                           //                                                           .waitrequest
		input  wire [5:0]  dma_ufm_avmm_bridge_0_avmm_burstcount,                            //                                                           .burstcount
		input  wire        dma_ufm_avmm_bridge_0_avmm_read,                                  //                                                           .read
		output wire [31:0] dma_ufm_avmm_bridge_0_avmm_readdata,                              //                                                           .readdata
		output wire        dma_ufm_avmm_bridge_0_avmm_readdatavalid,                         //                                                           .readdatavalid
		input  wire        dma_ufm_avmm_bridge_0_avmm_write,                                 //                                                           .write
		input  wire [31:0] dma_ufm_avmm_bridge_0_avmm_writedata,                             //                                                           .writedata
		input  wire [31:0] u_nios_data_master_address,                                       //                                         u_nios_data_master.address
		output wire        u_nios_data_master_waitrequest,                                   //                                                           .waitrequest
		input  wire [3:0]  u_nios_data_master_byteenable,                                    //                                                           .byteenable
		input  wire        u_nios_data_master_read,                                          //                                                           .read
		output wire [31:0] u_nios_data_master_readdata,                                      //                                                           .readdata
		input  wire        u_nios_data_master_write,                                         //                                                           .write
		input  wire [31:0] u_nios_data_master_writedata,                                     //                                                           .writedata
		input  wire        u_nios_data_master_debugaccess,                                   //                                                           .debugaccess
		input  wire [22:0] u_nios_instruction_master_address,                                //                                  u_nios_instruction_master.address
		output wire        u_nios_instruction_master_waitrequest,                            //                                                           .waitrequest
		input  wire        u_nios_instruction_master_read,                                   //                                                           .read
		output wire [31:0] u_nios_instruction_master_readdata,                               //                                                           .readdata
		output wire [7:0]  u_aes_avmm_bridge_avmm_address,                                   //                                     u_aes_avmm_bridge_avmm.address
		output wire        u_aes_avmm_bridge_avmm_write,                                     //                                                           .write
		output wire        u_aes_avmm_bridge_avmm_read,                                      //                                                           .read
		input  wire [31:0] u_aes_avmm_bridge_avmm_readdata,                                  //                                                           .readdata
		output wire [31:0] u_aes_avmm_bridge_avmm_writedata,                                 //                                                           .writedata
		input  wire        u_aes_avmm_bridge_avmm_readdatavalid,                             //                                                           .readdatavalid
		input  wire        u_aes_avmm_bridge_avmm_waitrequest,                               //                                                           .waitrequest
		output wire [6:0]  u_crypto_avmm_bridge_avmm_address,                                //                                  u_crypto_avmm_bridge_avmm.address
		output wire        u_crypto_avmm_bridge_avmm_write,                                  //                                                           .write
		output wire        u_crypto_avmm_bridge_avmm_read,                                   //                                                           .read
		input  wire [31:0] u_crypto_avmm_bridge_avmm_readdata,                               //                                                           .readdata
		output wire [31:0] u_crypto_avmm_bridge_avmm_writedata,                              //                                                           .writedata
		input  wire        u_crypto_avmm_bridge_avmm_readdatavalid,                          //                                                           .readdatavalid
		input  wire        u_crypto_avmm_bridge_avmm_waitrequest,                            //                                                           .waitrequest
		output wire [1:0]  u_crypto_dma_avmm_bridge_avmm_address,                            //                              u_crypto_dma_avmm_bridge_avmm.address
		output wire        u_crypto_dma_avmm_bridge_avmm_write,                              //                                                           .write
		output wire        u_crypto_dma_avmm_bridge_avmm_read,                               //                                                           .read
		input  wire [31:0] u_crypto_dma_avmm_bridge_avmm_readdata,                           //                                                           .readdata
		output wire [31:0] u_crypto_dma_avmm_bridge_avmm_writedata,                          //                                                           .writedata
		input  wire        u_crypto_dma_avmm_bridge_avmm_waitrequest,                        //                                                           .waitrequest
		output wire [2:0]  u_dual_config_avalon_address,                                     //                                       u_dual_config_avalon.address
		output wire        u_dual_config_avalon_write,                                       //                                                           .write
		output wire        u_dual_config_avalon_read,                                        //                                                           .read
		input  wire [31:0] u_dual_config_avalon_readdata,                                    //                                                           .readdata
		output wire [31:0] u_dual_config_avalon_writedata,                                   //                                                           .writedata
		output wire [1:0]  u_global_state_reg_s1_address,                                    //                                      u_global_state_reg_s1.address
		output wire        u_global_state_reg_s1_write,                                      //                                                           .write
		input  wire [31:0] u_global_state_reg_s1_readdata,                                   //                                                           .readdata
		output wire [31:0] u_global_state_reg_s1_writedata,                                  //                                                           .writedata
		output wire        u_global_state_reg_s1_chipselect,                                 //                                                           .chipselect
		output wire [1:0]  u_gpi_1_s1_address,                                               //                                                 u_gpi_1_s1.address
		input  wire [31:0] u_gpi_1_s1_readdata,                                              //                                                           .readdata
		output wire [1:0]  u_gpo_1_s1_address,                                               //                                                 u_gpo_1_s1.address
		output wire        u_gpo_1_s1_write,                                                 //                                                           .write
		input  wire [31:0] u_gpo_1_s1_readdata,                                              //                                                           .readdata
		output wire [31:0] u_gpo_1_s1_writedata,                                             //                                                           .writedata
		output wire        u_gpo_1_s1_chipselect,                                            //                                                           .chipselect
		output wire [1:0]  u_gpo_2_s1_address,                                               //                                                 u_gpo_2_s1.address
		output wire        u_gpo_2_s1_write,                                                 //                                                           .write
		input  wire [31:0] u_gpo_2_s1_readdata,                                              //                                                           .readdata
		output wire [31:0] u_gpo_2_s1_writedata,                                             //                                                           .writedata
		output wire        u_gpo_2_s1_chipselect,                                            //                                                           .chipselect
		output wire [7:0]  u_i3c_avmm_bridge_avmm_address,                                   //                                     u_i3c_avmm_bridge_avmm.address
		output wire        u_i3c_avmm_bridge_avmm_write,                                     //                                                           .write
		output wire        u_i3c_avmm_bridge_avmm_read,                                      //                                                           .read
		input  wire [31:0] u_i3c_avmm_bridge_avmm_readdata,                                  //                                                           .readdata
		output wire [31:0] u_i3c_avmm_bridge_avmm_writedata,                                 //                                                           .writedata
		input  wire        u_i3c_avmm_bridge_avmm_readdatavalid,                             //                                                           .readdatavalid
		input  wire        u_i3c_avmm_bridge_avmm_waitrequest,                               //                                                           .waitrequest
		output wire [7:0]  u_mailbox_avmm_bridge_avmm_address,                               //                                 u_mailbox_avmm_bridge_avmm.address
		output wire        u_mailbox_avmm_bridge_avmm_write,                                 //                                                           .write
		output wire        u_mailbox_avmm_bridge_avmm_read,                                  //                                                           .read
		input  wire [31:0] u_mailbox_avmm_bridge_avmm_readdata,                              //                                                           .readdata
		output wire [31:0] u_mailbox_avmm_bridge_avmm_writedata,                             //                                                           .writedata
		input  wire        u_mailbox_avmm_bridge_avmm_readdatavalid,                         //                                                           .readdatavalid
		input  wire        u_mailbox_avmm_bridge_avmm_waitrequest,                           //                                                           .waitrequest
		output wire [8:0]  u_nios_debug_mem_slave_address,                                   //                                     u_nios_debug_mem_slave.address
		output wire        u_nios_debug_mem_slave_write,                                     //                                                           .write
		output wire        u_nios_debug_mem_slave_read,                                      //                                                           .read
		input  wire [31:0] u_nios_debug_mem_slave_readdata,                                  //                                                           .readdata
		output wire [31:0] u_nios_debug_mem_slave_writedata,                                 //                                                           .writedata
		output wire [3:0]  u_nios_debug_mem_slave_byteenable,                                //                                                           .byteenable
		input  wire        u_nios_debug_mem_slave_waitrequest,                               //                                                           .waitrequest
		output wire        u_nios_debug_mem_slave_debugaccess,                               //                                                           .debugaccess
		output wire [14:0] u_nios_ram_s1_address,                                            //                                              u_nios_ram_s1.address
		output wire        u_nios_ram_s1_write,                                              //                                                           .write
		input  wire [31:0] u_nios_ram_s1_readdata,                                           //                                                           .readdata
		output wire [31:0] u_nios_ram_s1_writedata,                                          //                                                           .writedata
		output wire [3:0]  u_nios_ram_s1_byteenable,                                         //                                                           .byteenable
		output wire        u_nios_ram_s1_chipselect,                                         //                                                           .chipselect
		output wire        u_nios_ram_s1_clken,                                              //                                                           .clken
		output wire [7:0]  u_relay1_avmm_bridge_avmm_address,                                //                                  u_relay1_avmm_bridge_avmm.address
		output wire        u_relay1_avmm_bridge_avmm_write,                                  //                                                           .write
		output wire        u_relay1_avmm_bridge_avmm_read,                                   //                                                           .read
		input  wire [31:0] u_relay1_avmm_bridge_avmm_readdata,                               //                                                           .readdata
		output wire [31:0] u_relay1_avmm_bridge_avmm_writedata,                              //                                                           .writedata
		input  wire        u_relay1_avmm_bridge_avmm_waitrequest,                            //                                                           .waitrequest
		output wire [7:0]  u_relay2_avmm_bridge_avmm_address,                                //                                  u_relay2_avmm_bridge_avmm.address
		output wire        u_relay2_avmm_bridge_avmm_write,                                  //                                                           .write
		output wire        u_relay2_avmm_bridge_avmm_read,                                   //                                                           .read
		input  wire [31:0] u_relay2_avmm_bridge_avmm_readdata,                               //                                                           .readdata
		output wire [31:0] u_relay2_avmm_bridge_avmm_writedata,                              //                                                           .writedata
		input  wire        u_relay2_avmm_bridge_avmm_waitrequest,                            //                                                           .waitrequest
		output wire [7:0]  u_relay3_avmm_bridge_avmm_address,                                //                                  u_relay3_avmm_bridge_avmm.address
		output wire        u_relay3_avmm_bridge_avmm_write,                                  //                                                           .write
		output wire        u_relay3_avmm_bridge_avmm_read,                                   //                                                           .read
		input  wire [31:0] u_relay3_avmm_bridge_avmm_readdata,                               //                                                           .readdata
		output wire [31:0] u_relay3_avmm_bridge_avmm_writedata,                              //                                                           .writedata
		input  wire        u_relay3_avmm_bridge_avmm_waitrequest,                            //                                                           .waitrequest
		output wire [3:0]  u_rfnvram_smbus_master_avmm_address,                              //                                u_rfnvram_smbus_master_avmm.address
		output wire        u_rfnvram_smbus_master_avmm_write,                                //                                                           .write
		output wire        u_rfnvram_smbus_master_avmm_read,                                 //                                                           .read
		input  wire [31:0] u_rfnvram_smbus_master_avmm_readdata,                             //                                                           .readdata
		output wire [31:0] u_rfnvram_smbus_master_avmm_writedata,                            //                                                           .writedata
		input  wire        u_rfnvram_smbus_master_avmm_readdatavalid,                        //                                                           .readdatavalid
		input  wire        u_rfnvram_smbus_master_avmm_waitrequest,                          //                                                           .waitrequest
		output wire [24:0] u_spi_filter_avmm_bridge_avmm_address,                            //                              u_spi_filter_avmm_bridge_avmm.address
		output wire        u_spi_filter_avmm_bridge_avmm_write,                              //                                                           .write
		output wire        u_spi_filter_avmm_bridge_avmm_read,                               //                                                           .read
		input  wire [31:0] u_spi_filter_avmm_bridge_avmm_readdata,                           //                                                           .readdata
		output wire [31:0] u_spi_filter_avmm_bridge_avmm_writedata,                          //                                                           .writedata
		input  wire        u_spi_filter_avmm_bridge_avmm_readdatavalid,                      //                                                           .readdatavalid
		input  wire        u_spi_filter_avmm_bridge_avmm_waitrequest,                        //                                                           .waitrequest
		output wire [13:0] u_spi_filter_bmc_we_avmm_bridge_avmm_address,                     //                       u_spi_filter_bmc_we_avmm_bridge_avmm.address
		output wire        u_spi_filter_bmc_we_avmm_bridge_avmm_write,                       //                                                           .write
		output wire        u_spi_filter_bmc_we_avmm_bridge_avmm_read,                        //                                                           .read
		input  wire [31:0] u_spi_filter_bmc_we_avmm_bridge_avmm_readdata,                    //                                                           .readdata
		output wire [31:0] u_spi_filter_bmc_we_avmm_bridge_avmm_writedata,                   //                                                           .writedata
		input  wire        u_spi_filter_bmc_we_avmm_bridge_avmm_readdatavalid,               //                                                           .readdatavalid
		input  wire        u_spi_filter_bmc_we_avmm_bridge_avmm_waitrequest,                 //                                                           .waitrequest
		output wire [13:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_address,             //               u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm.address
		output wire        u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_write,               //                                                           .write
		output wire        u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_read,                //                                                           .read
		input  wire [31:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_readdata,            //                                                           .readdata
		output wire [31:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_writedata,           //                                                           .writedata
		input  wire        u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_readdatavalid,       //                                                           .readdatavalid
		input  wire        u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_waitrequest,         //                                                           .waitrequest
		output wire [13:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_address,             //               u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm.address
		output wire        u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_write,               //                                                           .write
		output wire        u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_read,                //                                                           .read
		input  wire [31:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_readdata,            //                                                           .readdata
		output wire [31:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_writedata,           //                                                           .writedata
		input  wire        u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_readdatavalid,       //                                                           .readdatavalid
		input  wire        u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_waitrequest,         //                                                           .waitrequest
		output wire [13:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_address,             //               u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm.address
		output wire        u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_write,               //                                                           .write
		output wire        u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_read,                //                                                           .read
		input  wire [31:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_readdata,            //                                                           .readdata
		output wire [31:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_writedata,           //                                                           .writedata
		input  wire        u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_readdatavalid,       //                                                           .readdatavalid
		input  wire        u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_waitrequest,         //                                                           .waitrequest
		output wire [13:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_address,             //               u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm.address
		output wire        u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_write,               //                                                           .write
		output wire        u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_read,                //                                                           .read
		input  wire [31:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_readdata,            //                                                           .readdata
		output wire [31:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_writedata,           //                                                           .writedata
		input  wire        u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_readdatavalid,       //                                                           .readdatavalid
		input  wire        u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_waitrequest,         //                                                           .waitrequest
		output wire [5:0]  u_spi_filter_csr_avmm_bridge_0_avmm_address,                      //                        u_spi_filter_csr_avmm_bridge_0_avmm.address
		output wire        u_spi_filter_csr_avmm_bridge_0_avmm_write,                        //                                                           .write
		output wire        u_spi_filter_csr_avmm_bridge_0_avmm_read,                         //                                                           .read
		input  wire [31:0] u_spi_filter_csr_avmm_bridge_0_avmm_readdata,                     //                                                           .readdata
		output wire [31:0] u_spi_filter_csr_avmm_bridge_0_avmm_writedata,                    //                                                           .writedata
		input  wire        u_spi_filter_csr_avmm_bridge_0_avmm_readdatavalid,                //                                                           .readdatavalid
		input  wire        u_spi_filter_csr_avmm_bridge_0_avmm_waitrequest,                  //                                                           .waitrequest
		output wire [10:0] u_timer_bank_avmm_bridge_avmm_address,                            //                              u_timer_bank_avmm_bridge_avmm.address
		output wire        u_timer_bank_avmm_bridge_avmm_write,                              //                                                           .write
		output wire        u_timer_bank_avmm_bridge_avmm_read,                               //                                                           .read
		input  wire [31:0] u_timer_bank_avmm_bridge_avmm_readdata,                           //                                                           .readdata
		output wire [31:0] u_timer_bank_avmm_bridge_avmm_writedata,                          //                                                           .writedata
		input  wire        u_timer_bank_avmm_bridge_avmm_waitrequest,                        //                                                           .waitrequest
		output wire [0:0]  u_ufm_csr_address,                                                //                                                  u_ufm_csr.address
		output wire        u_ufm_csr_write,                                                  //                                                           .write
		output wire        u_ufm_csr_read,                                                   //                                                           .read
		input  wire [31:0] u_ufm_csr_readdata,                                               //                                                           .readdata
		output wire [31:0] u_ufm_csr_writedata,                                              //                                                           .writedata
		output wire [18:0] u_ufm_data_address,                                               //                                                 u_ufm_data.address
		output wire        u_ufm_data_write,                                                 //                                                           .write
		output wire        u_ufm_data_read,                                                  //                                                           .read
		input  wire [31:0] u_ufm_data_readdata,                                              //                                                           .readdata
		output wire [31:0] u_ufm_data_writedata,                                             //                                                           .writedata
		output wire [1:0]  u_ufm_data_burstcount,                                            //                                                           .burstcount
		input  wire        u_ufm_data_readdatavalid,                                         //                                                           .readdatavalid
		input  wire        u_ufm_data_waitrequest                                            //                                                           .waitrequest
	);

	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_waitrequest;   // dma_ufm_avmm_bridge_0_avmm_agent:av_waitrequest -> dma_ufm_avmm_bridge_0_avmm_translator:uav_waitrequest
	wire   [31:0] dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdata;      // dma_ufm_avmm_bridge_0_avmm_agent:av_readdata -> dma_ufm_avmm_bridge_0_avmm_translator:uav_readdata
	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_debugaccess;   // dma_ufm_avmm_bridge_0_avmm_translator:uav_debugaccess -> dma_ufm_avmm_bridge_0_avmm_agent:av_debugaccess
	wire   [31:0] dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_address;       // dma_ufm_avmm_bridge_0_avmm_translator:uav_address -> dma_ufm_avmm_bridge_0_avmm_agent:av_address
	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_read;          // dma_ufm_avmm_bridge_0_avmm_translator:uav_read -> dma_ufm_avmm_bridge_0_avmm_agent:av_read
	wire    [3:0] dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_byteenable;    // dma_ufm_avmm_bridge_0_avmm_translator:uav_byteenable -> dma_ufm_avmm_bridge_0_avmm_agent:av_byteenable
	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdatavalid; // dma_ufm_avmm_bridge_0_avmm_agent:av_readdatavalid -> dma_ufm_avmm_bridge_0_avmm_translator:uav_readdatavalid
	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_lock;          // dma_ufm_avmm_bridge_0_avmm_translator:uav_lock -> dma_ufm_avmm_bridge_0_avmm_agent:av_lock
	wire          dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_write;         // dma_ufm_avmm_bridge_0_avmm_translator:uav_write -> dma_ufm_avmm_bridge_0_avmm_agent:av_write
	wire   [31:0] dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_writedata;     // dma_ufm_avmm_bridge_0_avmm_translator:uav_writedata -> dma_ufm_avmm_bridge_0_avmm_agent:av_writedata
	wire    [7:0] dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_burstcount;    // dma_ufm_avmm_bridge_0_avmm_translator:uav_burstcount -> dma_ufm_avmm_bridge_0_avmm_agent:av_burstcount
	wire          rsp_mux_src_valid;                                                             // rsp_mux:src_valid -> dma_ufm_avmm_bridge_0_avmm_agent:rp_valid
	wire  [116:0] rsp_mux_src_data;                                                              // rsp_mux:src_data -> dma_ufm_avmm_bridge_0_avmm_agent:rp_data
	wire          rsp_mux_src_ready;                                                             // dma_ufm_avmm_bridge_0_avmm_agent:rp_ready -> rsp_mux:src_ready
	wire   [25:0] rsp_mux_src_channel;                                                           // rsp_mux:src_channel -> dma_ufm_avmm_bridge_0_avmm_agent:rp_channel
	wire          rsp_mux_src_startofpacket;                                                     // rsp_mux:src_startofpacket -> dma_ufm_avmm_bridge_0_avmm_agent:rp_startofpacket
	wire          rsp_mux_src_endofpacket;                                                       // rsp_mux:src_endofpacket -> dma_ufm_avmm_bridge_0_avmm_agent:rp_endofpacket
	wire          u_nios_data_master_translator_avalon_universal_master_0_waitrequest;           // u_nios_data_master_agent:av_waitrequest -> u_nios_data_master_translator:uav_waitrequest
	wire   [31:0] u_nios_data_master_translator_avalon_universal_master_0_readdata;              // u_nios_data_master_agent:av_readdata -> u_nios_data_master_translator:uav_readdata
	wire          u_nios_data_master_translator_avalon_universal_master_0_debugaccess;           // u_nios_data_master_translator:uav_debugaccess -> u_nios_data_master_agent:av_debugaccess
	wire   [31:0] u_nios_data_master_translator_avalon_universal_master_0_address;               // u_nios_data_master_translator:uav_address -> u_nios_data_master_agent:av_address
	wire          u_nios_data_master_translator_avalon_universal_master_0_read;                  // u_nios_data_master_translator:uav_read -> u_nios_data_master_agent:av_read
	wire    [3:0] u_nios_data_master_translator_avalon_universal_master_0_byteenable;            // u_nios_data_master_translator:uav_byteenable -> u_nios_data_master_agent:av_byteenable
	wire          u_nios_data_master_translator_avalon_universal_master_0_readdatavalid;         // u_nios_data_master_agent:av_readdatavalid -> u_nios_data_master_translator:uav_readdatavalid
	wire          u_nios_data_master_translator_avalon_universal_master_0_lock;                  // u_nios_data_master_translator:uav_lock -> u_nios_data_master_agent:av_lock
	wire          u_nios_data_master_translator_avalon_universal_master_0_write;                 // u_nios_data_master_translator:uav_write -> u_nios_data_master_agent:av_write
	wire   [31:0] u_nios_data_master_translator_avalon_universal_master_0_writedata;             // u_nios_data_master_translator:uav_writedata -> u_nios_data_master_agent:av_writedata
	wire    [2:0] u_nios_data_master_translator_avalon_universal_master_0_burstcount;            // u_nios_data_master_translator:uav_burstcount -> u_nios_data_master_agent:av_burstcount
	wire          rsp_mux_001_src_valid;                                                         // rsp_mux_001:src_valid -> u_nios_data_master_agent:rp_valid
	wire  [116:0] rsp_mux_001_src_data;                                                          // rsp_mux_001:src_data -> u_nios_data_master_agent:rp_data
	wire          rsp_mux_001_src_ready;                                                         // u_nios_data_master_agent:rp_ready -> rsp_mux_001:src_ready
	wire   [25:0] rsp_mux_001_src_channel;                                                       // rsp_mux_001:src_channel -> u_nios_data_master_agent:rp_channel
	wire          rsp_mux_001_src_startofpacket;                                                 // rsp_mux_001:src_startofpacket -> u_nios_data_master_agent:rp_startofpacket
	wire          rsp_mux_001_src_endofpacket;                                                   // rsp_mux_001:src_endofpacket -> u_nios_data_master_agent:rp_endofpacket
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_waitrequest;    // u_nios_instruction_master_agent:av_waitrequest -> u_nios_instruction_master_translator:uav_waitrequest
	wire   [31:0] u_nios_instruction_master_translator_avalon_universal_master_0_readdata;       // u_nios_instruction_master_agent:av_readdata -> u_nios_instruction_master_translator:uav_readdata
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_debugaccess;    // u_nios_instruction_master_translator:uav_debugaccess -> u_nios_instruction_master_agent:av_debugaccess
	wire   [31:0] u_nios_instruction_master_translator_avalon_universal_master_0_address;        // u_nios_instruction_master_translator:uav_address -> u_nios_instruction_master_agent:av_address
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_read;           // u_nios_instruction_master_translator:uav_read -> u_nios_instruction_master_agent:av_read
	wire    [3:0] u_nios_instruction_master_translator_avalon_universal_master_0_byteenable;     // u_nios_instruction_master_translator:uav_byteenable -> u_nios_instruction_master_agent:av_byteenable
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_readdatavalid;  // u_nios_instruction_master_agent:av_readdatavalid -> u_nios_instruction_master_translator:uav_readdatavalid
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_lock;           // u_nios_instruction_master_translator:uav_lock -> u_nios_instruction_master_agent:av_lock
	wire          u_nios_instruction_master_translator_avalon_universal_master_0_write;          // u_nios_instruction_master_translator:uav_write -> u_nios_instruction_master_agent:av_write
	wire   [31:0] u_nios_instruction_master_translator_avalon_universal_master_0_writedata;      // u_nios_instruction_master_translator:uav_writedata -> u_nios_instruction_master_agent:av_writedata
	wire    [2:0] u_nios_instruction_master_translator_avalon_universal_master_0_burstcount;     // u_nios_instruction_master_translator:uav_burstcount -> u_nios_instruction_master_agent:av_burstcount
	wire          rsp_mux_002_src_valid;                                                         // rsp_mux_002:src_valid -> u_nios_instruction_master_agent:rp_valid
	wire  [116:0] rsp_mux_002_src_data;                                                          // rsp_mux_002:src_data -> u_nios_instruction_master_agent:rp_data
	wire          rsp_mux_002_src_ready;                                                         // u_nios_instruction_master_agent:rp_ready -> rsp_mux_002:src_ready
	wire   [25:0] rsp_mux_002_src_channel;                                                       // rsp_mux_002:src_channel -> u_nios_instruction_master_agent:rp_channel
	wire          rsp_mux_002_src_startofpacket;                                                 // rsp_mux_002:src_startofpacket -> u_nios_instruction_master_agent:rp_startofpacket
	wire          rsp_mux_002_src_endofpacket;                                                   // rsp_mux_002:src_endofpacket -> u_nios_instruction_master_agent:rp_endofpacket
	wire   [31:0] u_ufm_data_agent_m0_readdata;                                                  // u_ufm_data_translator:uav_readdata -> u_ufm_data_agent:m0_readdata
	wire          u_ufm_data_agent_m0_waitrequest;                                               // u_ufm_data_translator:uav_waitrequest -> u_ufm_data_agent:m0_waitrequest
	wire          u_ufm_data_agent_m0_debugaccess;                                               // u_ufm_data_agent:m0_debugaccess -> u_ufm_data_translator:uav_debugaccess
	wire   [31:0] u_ufm_data_agent_m0_address;                                                   // u_ufm_data_agent:m0_address -> u_ufm_data_translator:uav_address
	wire    [3:0] u_ufm_data_agent_m0_byteenable;                                                // u_ufm_data_agent:m0_byteenable -> u_ufm_data_translator:uav_byteenable
	wire          u_ufm_data_agent_m0_read;                                                      // u_ufm_data_agent:m0_read -> u_ufm_data_translator:uav_read
	wire          u_ufm_data_agent_m0_readdatavalid;                                             // u_ufm_data_translator:uav_readdatavalid -> u_ufm_data_agent:m0_readdatavalid
	wire          u_ufm_data_agent_m0_lock;                                                      // u_ufm_data_agent:m0_lock -> u_ufm_data_translator:uav_lock
	wire   [31:0] u_ufm_data_agent_m0_writedata;                                                 // u_ufm_data_agent:m0_writedata -> u_ufm_data_translator:uav_writedata
	wire          u_ufm_data_agent_m0_write;                                                     // u_ufm_data_agent:m0_write -> u_ufm_data_translator:uav_write
	wire    [3:0] u_ufm_data_agent_m0_burstcount;                                                // u_ufm_data_agent:m0_burstcount -> u_ufm_data_translator:uav_burstcount
	wire          u_ufm_data_agent_rf_source_valid;                                              // u_ufm_data_agent:rf_source_valid -> u_ufm_data_agent_rsp_fifo:in_valid
	wire  [117:0] u_ufm_data_agent_rf_source_data;                                               // u_ufm_data_agent:rf_source_data -> u_ufm_data_agent_rsp_fifo:in_data
	wire          u_ufm_data_agent_rf_source_ready;                                              // u_ufm_data_agent_rsp_fifo:in_ready -> u_ufm_data_agent:rf_source_ready
	wire          u_ufm_data_agent_rf_source_startofpacket;                                      // u_ufm_data_agent:rf_source_startofpacket -> u_ufm_data_agent_rsp_fifo:in_startofpacket
	wire          u_ufm_data_agent_rf_source_endofpacket;                                        // u_ufm_data_agent:rf_source_endofpacket -> u_ufm_data_agent_rsp_fifo:in_endofpacket
	wire          u_ufm_data_agent_rsp_fifo_out_valid;                                           // u_ufm_data_agent_rsp_fifo:out_valid -> u_ufm_data_agent:rf_sink_valid
	wire  [117:0] u_ufm_data_agent_rsp_fifo_out_data;                                            // u_ufm_data_agent_rsp_fifo:out_data -> u_ufm_data_agent:rf_sink_data
	wire          u_ufm_data_agent_rsp_fifo_out_ready;                                           // u_ufm_data_agent:rf_sink_ready -> u_ufm_data_agent_rsp_fifo:out_ready
	wire          u_ufm_data_agent_rsp_fifo_out_startofpacket;                                   // u_ufm_data_agent_rsp_fifo:out_startofpacket -> u_ufm_data_agent:rf_sink_startofpacket
	wire          u_ufm_data_agent_rsp_fifo_out_endofpacket;                                     // u_ufm_data_agent_rsp_fifo:out_endofpacket -> u_ufm_data_agent:rf_sink_endofpacket
	wire   [31:0] u_nios_debug_mem_slave_agent_m0_readdata;                                      // u_nios_debug_mem_slave_translator:uav_readdata -> u_nios_debug_mem_slave_agent:m0_readdata
	wire          u_nios_debug_mem_slave_agent_m0_waitrequest;                                   // u_nios_debug_mem_slave_translator:uav_waitrequest -> u_nios_debug_mem_slave_agent:m0_waitrequest
	wire          u_nios_debug_mem_slave_agent_m0_debugaccess;                                   // u_nios_debug_mem_slave_agent:m0_debugaccess -> u_nios_debug_mem_slave_translator:uav_debugaccess
	wire   [31:0] u_nios_debug_mem_slave_agent_m0_address;                                       // u_nios_debug_mem_slave_agent:m0_address -> u_nios_debug_mem_slave_translator:uav_address
	wire    [3:0] u_nios_debug_mem_slave_agent_m0_byteenable;                                    // u_nios_debug_mem_slave_agent:m0_byteenable -> u_nios_debug_mem_slave_translator:uav_byteenable
	wire          u_nios_debug_mem_slave_agent_m0_read;                                          // u_nios_debug_mem_slave_agent:m0_read -> u_nios_debug_mem_slave_translator:uav_read
	wire          u_nios_debug_mem_slave_agent_m0_readdatavalid;                                 // u_nios_debug_mem_slave_translator:uav_readdatavalid -> u_nios_debug_mem_slave_agent:m0_readdatavalid
	wire          u_nios_debug_mem_slave_agent_m0_lock;                                          // u_nios_debug_mem_slave_agent:m0_lock -> u_nios_debug_mem_slave_translator:uav_lock
	wire   [31:0] u_nios_debug_mem_slave_agent_m0_writedata;                                     // u_nios_debug_mem_slave_agent:m0_writedata -> u_nios_debug_mem_slave_translator:uav_writedata
	wire          u_nios_debug_mem_slave_agent_m0_write;                                         // u_nios_debug_mem_slave_agent:m0_write -> u_nios_debug_mem_slave_translator:uav_write
	wire    [2:0] u_nios_debug_mem_slave_agent_m0_burstcount;                                    // u_nios_debug_mem_slave_agent:m0_burstcount -> u_nios_debug_mem_slave_translator:uav_burstcount
	wire          u_nios_debug_mem_slave_agent_rf_source_valid;                                  // u_nios_debug_mem_slave_agent:rf_source_valid -> u_nios_debug_mem_slave_agent_rsp_fifo:in_valid
	wire  [117:0] u_nios_debug_mem_slave_agent_rf_source_data;                                   // u_nios_debug_mem_slave_agent:rf_source_data -> u_nios_debug_mem_slave_agent_rsp_fifo:in_data
	wire          u_nios_debug_mem_slave_agent_rf_source_ready;                                  // u_nios_debug_mem_slave_agent_rsp_fifo:in_ready -> u_nios_debug_mem_slave_agent:rf_source_ready
	wire          u_nios_debug_mem_slave_agent_rf_source_startofpacket;                          // u_nios_debug_mem_slave_agent:rf_source_startofpacket -> u_nios_debug_mem_slave_agent_rsp_fifo:in_startofpacket
	wire          u_nios_debug_mem_slave_agent_rf_source_endofpacket;                            // u_nios_debug_mem_slave_agent:rf_source_endofpacket -> u_nios_debug_mem_slave_agent_rsp_fifo:in_endofpacket
	wire          u_nios_debug_mem_slave_agent_rsp_fifo_out_valid;                               // u_nios_debug_mem_slave_agent_rsp_fifo:out_valid -> u_nios_debug_mem_slave_agent:rf_sink_valid
	wire  [117:0] u_nios_debug_mem_slave_agent_rsp_fifo_out_data;                                // u_nios_debug_mem_slave_agent_rsp_fifo:out_data -> u_nios_debug_mem_slave_agent:rf_sink_data
	wire          u_nios_debug_mem_slave_agent_rsp_fifo_out_ready;                               // u_nios_debug_mem_slave_agent:rf_sink_ready -> u_nios_debug_mem_slave_agent_rsp_fifo:out_ready
	wire          u_nios_debug_mem_slave_agent_rsp_fifo_out_startofpacket;                       // u_nios_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> u_nios_debug_mem_slave_agent:rf_sink_startofpacket
	wire          u_nios_debug_mem_slave_agent_rsp_fifo_out_endofpacket;                         // u_nios_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> u_nios_debug_mem_slave_agent:rf_sink_endofpacket
	wire          cmd_mux_001_src_valid;                                                         // cmd_mux_001:src_valid -> u_nios_debug_mem_slave_agent:cp_valid
	wire  [116:0] cmd_mux_001_src_data;                                                          // cmd_mux_001:src_data -> u_nios_debug_mem_slave_agent:cp_data
	wire          cmd_mux_001_src_ready;                                                         // u_nios_debug_mem_slave_agent:cp_ready -> cmd_mux_001:src_ready
	wire   [25:0] cmd_mux_001_src_channel;                                                       // cmd_mux_001:src_channel -> u_nios_debug_mem_slave_agent:cp_channel
	wire          cmd_mux_001_src_startofpacket;                                                 // cmd_mux_001:src_startofpacket -> u_nios_debug_mem_slave_agent:cp_startofpacket
	wire          cmd_mux_001_src_endofpacket;                                                   // cmd_mux_001:src_endofpacket -> u_nios_debug_mem_slave_agent:cp_endofpacket
	wire   [31:0] u_nios_ram_s1_agent_m0_readdata;                                               // u_nios_ram_s1_translator:uav_readdata -> u_nios_ram_s1_agent:m0_readdata
	wire          u_nios_ram_s1_agent_m0_waitrequest;                                            // u_nios_ram_s1_translator:uav_waitrequest -> u_nios_ram_s1_agent:m0_waitrequest
	wire          u_nios_ram_s1_agent_m0_debugaccess;                                            // u_nios_ram_s1_agent:m0_debugaccess -> u_nios_ram_s1_translator:uav_debugaccess
	wire   [31:0] u_nios_ram_s1_agent_m0_address;                                                // u_nios_ram_s1_agent:m0_address -> u_nios_ram_s1_translator:uav_address
	wire    [3:0] u_nios_ram_s1_agent_m0_byteenable;                                             // u_nios_ram_s1_agent:m0_byteenable -> u_nios_ram_s1_translator:uav_byteenable
	wire          u_nios_ram_s1_agent_m0_read;                                                   // u_nios_ram_s1_agent:m0_read -> u_nios_ram_s1_translator:uav_read
	wire          u_nios_ram_s1_agent_m0_readdatavalid;                                          // u_nios_ram_s1_translator:uav_readdatavalid -> u_nios_ram_s1_agent:m0_readdatavalid
	wire          u_nios_ram_s1_agent_m0_lock;                                                   // u_nios_ram_s1_agent:m0_lock -> u_nios_ram_s1_translator:uav_lock
	wire   [31:0] u_nios_ram_s1_agent_m0_writedata;                                              // u_nios_ram_s1_agent:m0_writedata -> u_nios_ram_s1_translator:uav_writedata
	wire          u_nios_ram_s1_agent_m0_write;                                                  // u_nios_ram_s1_agent:m0_write -> u_nios_ram_s1_translator:uav_write
	wire    [2:0] u_nios_ram_s1_agent_m0_burstcount;                                             // u_nios_ram_s1_agent:m0_burstcount -> u_nios_ram_s1_translator:uav_burstcount
	wire          u_nios_ram_s1_agent_rf_source_valid;                                           // u_nios_ram_s1_agent:rf_source_valid -> u_nios_ram_s1_agent_rsp_fifo:in_valid
	wire  [117:0] u_nios_ram_s1_agent_rf_source_data;                                            // u_nios_ram_s1_agent:rf_source_data -> u_nios_ram_s1_agent_rsp_fifo:in_data
	wire          u_nios_ram_s1_agent_rf_source_ready;                                           // u_nios_ram_s1_agent_rsp_fifo:in_ready -> u_nios_ram_s1_agent:rf_source_ready
	wire          u_nios_ram_s1_agent_rf_source_startofpacket;                                   // u_nios_ram_s1_agent:rf_source_startofpacket -> u_nios_ram_s1_agent_rsp_fifo:in_startofpacket
	wire          u_nios_ram_s1_agent_rf_source_endofpacket;                                     // u_nios_ram_s1_agent:rf_source_endofpacket -> u_nios_ram_s1_agent_rsp_fifo:in_endofpacket
	wire          u_nios_ram_s1_agent_rsp_fifo_out_valid;                                        // u_nios_ram_s1_agent_rsp_fifo:out_valid -> u_nios_ram_s1_agent:rf_sink_valid
	wire  [117:0] u_nios_ram_s1_agent_rsp_fifo_out_data;                                         // u_nios_ram_s1_agent_rsp_fifo:out_data -> u_nios_ram_s1_agent:rf_sink_data
	wire          u_nios_ram_s1_agent_rsp_fifo_out_ready;                                        // u_nios_ram_s1_agent:rf_sink_ready -> u_nios_ram_s1_agent_rsp_fifo:out_ready
	wire          u_nios_ram_s1_agent_rsp_fifo_out_startofpacket;                                // u_nios_ram_s1_agent_rsp_fifo:out_startofpacket -> u_nios_ram_s1_agent:rf_sink_startofpacket
	wire          u_nios_ram_s1_agent_rsp_fifo_out_endofpacket;                                  // u_nios_ram_s1_agent_rsp_fifo:out_endofpacket -> u_nios_ram_s1_agent:rf_sink_endofpacket
	wire          cmd_mux_002_src_valid;                                                         // cmd_mux_002:src_valid -> u_nios_ram_s1_agent:cp_valid
	wire  [116:0] cmd_mux_002_src_data;                                                          // cmd_mux_002:src_data -> u_nios_ram_s1_agent:cp_data
	wire          cmd_mux_002_src_ready;                                                         // u_nios_ram_s1_agent:cp_ready -> cmd_mux_002:src_ready
	wire   [25:0] cmd_mux_002_src_channel;                                                       // cmd_mux_002:src_channel -> u_nios_ram_s1_agent:cp_channel
	wire          cmd_mux_002_src_startofpacket;                                                 // cmd_mux_002:src_startofpacket -> u_nios_ram_s1_agent:cp_startofpacket
	wire          cmd_mux_002_src_endofpacket;                                                   // cmd_mux_002:src_endofpacket -> u_nios_ram_s1_agent:cp_endofpacket
	wire   [31:0] u_dual_config_avalon_agent_m0_readdata;                                        // u_dual_config_avalon_translator:uav_readdata -> u_dual_config_avalon_agent:m0_readdata
	wire          u_dual_config_avalon_agent_m0_waitrequest;                                     // u_dual_config_avalon_translator:uav_waitrequest -> u_dual_config_avalon_agent:m0_waitrequest
	wire          u_dual_config_avalon_agent_m0_debugaccess;                                     // u_dual_config_avalon_agent:m0_debugaccess -> u_dual_config_avalon_translator:uav_debugaccess
	wire   [31:0] u_dual_config_avalon_agent_m0_address;                                         // u_dual_config_avalon_agent:m0_address -> u_dual_config_avalon_translator:uav_address
	wire    [3:0] u_dual_config_avalon_agent_m0_byteenable;                                      // u_dual_config_avalon_agent:m0_byteenable -> u_dual_config_avalon_translator:uav_byteenable
	wire          u_dual_config_avalon_agent_m0_read;                                            // u_dual_config_avalon_agent:m0_read -> u_dual_config_avalon_translator:uav_read
	wire          u_dual_config_avalon_agent_m0_readdatavalid;                                   // u_dual_config_avalon_translator:uav_readdatavalid -> u_dual_config_avalon_agent:m0_readdatavalid
	wire          u_dual_config_avalon_agent_m0_lock;                                            // u_dual_config_avalon_agent:m0_lock -> u_dual_config_avalon_translator:uav_lock
	wire   [31:0] u_dual_config_avalon_agent_m0_writedata;                                       // u_dual_config_avalon_agent:m0_writedata -> u_dual_config_avalon_translator:uav_writedata
	wire          u_dual_config_avalon_agent_m0_write;                                           // u_dual_config_avalon_agent:m0_write -> u_dual_config_avalon_translator:uav_write
	wire    [2:0] u_dual_config_avalon_agent_m0_burstcount;                                      // u_dual_config_avalon_agent:m0_burstcount -> u_dual_config_avalon_translator:uav_burstcount
	wire          u_dual_config_avalon_agent_rf_source_valid;                                    // u_dual_config_avalon_agent:rf_source_valid -> u_dual_config_avalon_agent_rsp_fifo:in_valid
	wire  [117:0] u_dual_config_avalon_agent_rf_source_data;                                     // u_dual_config_avalon_agent:rf_source_data -> u_dual_config_avalon_agent_rsp_fifo:in_data
	wire          u_dual_config_avalon_agent_rf_source_ready;                                    // u_dual_config_avalon_agent_rsp_fifo:in_ready -> u_dual_config_avalon_agent:rf_source_ready
	wire          u_dual_config_avalon_agent_rf_source_startofpacket;                            // u_dual_config_avalon_agent:rf_source_startofpacket -> u_dual_config_avalon_agent_rsp_fifo:in_startofpacket
	wire          u_dual_config_avalon_agent_rf_source_endofpacket;                              // u_dual_config_avalon_agent:rf_source_endofpacket -> u_dual_config_avalon_agent_rsp_fifo:in_endofpacket
	wire          u_dual_config_avalon_agent_rsp_fifo_out_valid;                                 // u_dual_config_avalon_agent_rsp_fifo:out_valid -> u_dual_config_avalon_agent:rf_sink_valid
	wire  [117:0] u_dual_config_avalon_agent_rsp_fifo_out_data;                                  // u_dual_config_avalon_agent_rsp_fifo:out_data -> u_dual_config_avalon_agent:rf_sink_data
	wire          u_dual_config_avalon_agent_rsp_fifo_out_ready;                                 // u_dual_config_avalon_agent:rf_sink_ready -> u_dual_config_avalon_agent_rsp_fifo:out_ready
	wire          u_dual_config_avalon_agent_rsp_fifo_out_startofpacket;                         // u_dual_config_avalon_agent_rsp_fifo:out_startofpacket -> u_dual_config_avalon_agent:rf_sink_startofpacket
	wire          u_dual_config_avalon_agent_rsp_fifo_out_endofpacket;                           // u_dual_config_avalon_agent_rsp_fifo:out_endofpacket -> u_dual_config_avalon_agent:rf_sink_endofpacket
	wire          cmd_mux_003_src_valid;                                                         // cmd_mux_003:src_valid -> u_dual_config_avalon_agent:cp_valid
	wire  [116:0] cmd_mux_003_src_data;                                                          // cmd_mux_003:src_data -> u_dual_config_avalon_agent:cp_data
	wire          cmd_mux_003_src_ready;                                                         // u_dual_config_avalon_agent:cp_ready -> cmd_mux_003:src_ready
	wire   [25:0] cmd_mux_003_src_channel;                                                       // cmd_mux_003:src_channel -> u_dual_config_avalon_agent:cp_channel
	wire          cmd_mux_003_src_startofpacket;                                                 // cmd_mux_003:src_startofpacket -> u_dual_config_avalon_agent:cp_startofpacket
	wire          cmd_mux_003_src_endofpacket;                                                   // cmd_mux_003:src_endofpacket -> u_dual_config_avalon_agent:cp_endofpacket
	wire   [31:0] u_relay1_avmm_bridge_avmm_agent_m0_readdata;                                   // u_relay1_avmm_bridge_avmm_translator:uav_readdata -> u_relay1_avmm_bridge_avmm_agent:m0_readdata
	wire          u_relay1_avmm_bridge_avmm_agent_m0_waitrequest;                                // u_relay1_avmm_bridge_avmm_translator:uav_waitrequest -> u_relay1_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_relay1_avmm_bridge_avmm_agent_m0_debugaccess;                                // u_relay1_avmm_bridge_avmm_agent:m0_debugaccess -> u_relay1_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_relay1_avmm_bridge_avmm_agent_m0_address;                                    // u_relay1_avmm_bridge_avmm_agent:m0_address -> u_relay1_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_relay1_avmm_bridge_avmm_agent_m0_byteenable;                                 // u_relay1_avmm_bridge_avmm_agent:m0_byteenable -> u_relay1_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_relay1_avmm_bridge_avmm_agent_m0_read;                                       // u_relay1_avmm_bridge_avmm_agent:m0_read -> u_relay1_avmm_bridge_avmm_translator:uav_read
	wire          u_relay1_avmm_bridge_avmm_agent_m0_readdatavalid;                              // u_relay1_avmm_bridge_avmm_translator:uav_readdatavalid -> u_relay1_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_relay1_avmm_bridge_avmm_agent_m0_lock;                                       // u_relay1_avmm_bridge_avmm_agent:m0_lock -> u_relay1_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_relay1_avmm_bridge_avmm_agent_m0_writedata;                                  // u_relay1_avmm_bridge_avmm_agent:m0_writedata -> u_relay1_avmm_bridge_avmm_translator:uav_writedata
	wire          u_relay1_avmm_bridge_avmm_agent_m0_write;                                      // u_relay1_avmm_bridge_avmm_agent:m0_write -> u_relay1_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_relay1_avmm_bridge_avmm_agent_m0_burstcount;                                 // u_relay1_avmm_bridge_avmm_agent:m0_burstcount -> u_relay1_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_relay1_avmm_bridge_avmm_agent_rf_source_valid;                               // u_relay1_avmm_bridge_avmm_agent:rf_source_valid -> u_relay1_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_relay1_avmm_bridge_avmm_agent_rf_source_data;                                // u_relay1_avmm_bridge_avmm_agent:rf_source_data -> u_relay1_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_relay1_avmm_bridge_avmm_agent_rf_source_ready;                               // u_relay1_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_relay1_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_relay1_avmm_bridge_avmm_agent_rf_source_startofpacket;                       // u_relay1_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_relay1_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_relay1_avmm_bridge_avmm_agent_rf_source_endofpacket;                         // u_relay1_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_relay1_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                            // u_relay1_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_relay1_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_data;                             // u_relay1_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_relay1_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                            // u_relay1_avmm_bridge_avmm_agent:rf_sink_ready -> u_relay1_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                    // u_relay1_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_relay1_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                      // u_relay1_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_relay1_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_004_src_valid;                                                         // cmd_mux_004:src_valid -> u_relay1_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_004_src_data;                                                          // cmd_mux_004:src_data -> u_relay1_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_004_src_ready;                                                         // u_relay1_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_004:src_ready
	wire   [25:0] cmd_mux_004_src_channel;                                                       // cmd_mux_004:src_channel -> u_relay1_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_004_src_startofpacket;                                                 // cmd_mux_004:src_startofpacket -> u_relay1_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_004_src_endofpacket;                                                   // cmd_mux_004:src_endofpacket -> u_relay1_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdata;                         // u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_readdata -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_readdata
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_waitrequest;                      // u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_waitrequest -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_waitrequest
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_debugaccess;                      // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_debugaccess -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_address;                          // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_address -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_byteenable;                       // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_byteenable -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_byteenable
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_read;                             // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_read -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_read
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdatavalid;                    // u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_readdatavalid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_lock;                             // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_lock -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_writedata;                        // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_writedata -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_writedata
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_write;                            // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_write -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_burstcount;                       // u_spi_filter_csr_avmm_bridge_0_avmm_agent:m0_burstcount -> u_spi_filter_csr_avmm_bridge_0_avmm_translator:uav_burstcount
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_valid;                     // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_source_valid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_data;                      // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_source_data -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_ready;                     // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_source_ready
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_startofpacket;             // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_source_startofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_endofpacket;               // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_source_endofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_valid;                  // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_data;                   // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:out_data -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_sink_data
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_ready;                  // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_sink_ready -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_startofpacket;          // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_endofpacket;            // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rf_sink_endofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_valid;                // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_src_valid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:in_valid
	wire   [33:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_data;                 // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_src_data -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:in_data
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_ready;                // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:in_ready -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_src_ready
	wire          cmd_mux_005_src_valid;                                                         // cmd_mux_005:src_valid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_005_src_data;                                                          // cmd_mux_005:src_data -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_data
	wire          cmd_mux_005_src_ready;                                                         // u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_ready -> cmd_mux_005:src_ready
	wire   [25:0] cmd_mux_005_src_channel;                                                       // cmd_mux_005:src_channel -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_channel
	wire          cmd_mux_005_src_startofpacket;                                                 // cmd_mux_005:src_startofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_startofpacket
	wire          cmd_mux_005_src_endofpacket;                                                   // cmd_mux_005:src_endofpacket -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:cp_endofpacket
	wire   [31:0] u_relay3_avmm_bridge_avmm_agent_m0_readdata;                                   // u_relay3_avmm_bridge_avmm_translator:uav_readdata -> u_relay3_avmm_bridge_avmm_agent:m0_readdata
	wire          u_relay3_avmm_bridge_avmm_agent_m0_waitrequest;                                // u_relay3_avmm_bridge_avmm_translator:uav_waitrequest -> u_relay3_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_relay3_avmm_bridge_avmm_agent_m0_debugaccess;                                // u_relay3_avmm_bridge_avmm_agent:m0_debugaccess -> u_relay3_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_relay3_avmm_bridge_avmm_agent_m0_address;                                    // u_relay3_avmm_bridge_avmm_agent:m0_address -> u_relay3_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_relay3_avmm_bridge_avmm_agent_m0_byteenable;                                 // u_relay3_avmm_bridge_avmm_agent:m0_byteenable -> u_relay3_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_relay3_avmm_bridge_avmm_agent_m0_read;                                       // u_relay3_avmm_bridge_avmm_agent:m0_read -> u_relay3_avmm_bridge_avmm_translator:uav_read
	wire          u_relay3_avmm_bridge_avmm_agent_m0_readdatavalid;                              // u_relay3_avmm_bridge_avmm_translator:uav_readdatavalid -> u_relay3_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_relay3_avmm_bridge_avmm_agent_m0_lock;                                       // u_relay3_avmm_bridge_avmm_agent:m0_lock -> u_relay3_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_relay3_avmm_bridge_avmm_agent_m0_writedata;                                  // u_relay3_avmm_bridge_avmm_agent:m0_writedata -> u_relay3_avmm_bridge_avmm_translator:uav_writedata
	wire          u_relay3_avmm_bridge_avmm_agent_m0_write;                                      // u_relay3_avmm_bridge_avmm_agent:m0_write -> u_relay3_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_relay3_avmm_bridge_avmm_agent_m0_burstcount;                                 // u_relay3_avmm_bridge_avmm_agent:m0_burstcount -> u_relay3_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_relay3_avmm_bridge_avmm_agent_rf_source_valid;                               // u_relay3_avmm_bridge_avmm_agent:rf_source_valid -> u_relay3_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_relay3_avmm_bridge_avmm_agent_rf_source_data;                                // u_relay3_avmm_bridge_avmm_agent:rf_source_data -> u_relay3_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_relay3_avmm_bridge_avmm_agent_rf_source_ready;                               // u_relay3_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_relay3_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_relay3_avmm_bridge_avmm_agent_rf_source_startofpacket;                       // u_relay3_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_relay3_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_relay3_avmm_bridge_avmm_agent_rf_source_endofpacket;                         // u_relay3_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_relay3_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                            // u_relay3_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_relay3_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_data;                             // u_relay3_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_relay3_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                            // u_relay3_avmm_bridge_avmm_agent:rf_sink_ready -> u_relay3_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                    // u_relay3_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_relay3_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                      // u_relay3_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_relay3_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_006_src_valid;                                                         // cmd_mux_006:src_valid -> u_relay3_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_006_src_data;                                                          // cmd_mux_006:src_data -> u_relay3_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_006_src_ready;                                                         // u_relay3_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_006:src_ready
	wire   [25:0] cmd_mux_006_src_channel;                                                       // cmd_mux_006:src_channel -> u_relay3_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_006_src_startofpacket;                                                 // cmd_mux_006:src_startofpacket -> u_relay3_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_006_src_endofpacket;                                                   // cmd_mux_006:src_endofpacket -> u_relay3_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_mailbox_avmm_bridge_avmm_agent_m0_readdata;                                  // u_mailbox_avmm_bridge_avmm_translator:uav_readdata -> u_mailbox_avmm_bridge_avmm_agent:m0_readdata
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_waitrequest;                               // u_mailbox_avmm_bridge_avmm_translator:uav_waitrequest -> u_mailbox_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_debugaccess;                               // u_mailbox_avmm_bridge_avmm_agent:m0_debugaccess -> u_mailbox_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_mailbox_avmm_bridge_avmm_agent_m0_address;                                   // u_mailbox_avmm_bridge_avmm_agent:m0_address -> u_mailbox_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_mailbox_avmm_bridge_avmm_agent_m0_byteenable;                                // u_mailbox_avmm_bridge_avmm_agent:m0_byteenable -> u_mailbox_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_read;                                      // u_mailbox_avmm_bridge_avmm_agent:m0_read -> u_mailbox_avmm_bridge_avmm_translator:uav_read
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_readdatavalid;                             // u_mailbox_avmm_bridge_avmm_translator:uav_readdatavalid -> u_mailbox_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_lock;                                      // u_mailbox_avmm_bridge_avmm_agent:m0_lock -> u_mailbox_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_mailbox_avmm_bridge_avmm_agent_m0_writedata;                                 // u_mailbox_avmm_bridge_avmm_agent:m0_writedata -> u_mailbox_avmm_bridge_avmm_translator:uav_writedata
	wire          u_mailbox_avmm_bridge_avmm_agent_m0_write;                                     // u_mailbox_avmm_bridge_avmm_agent:m0_write -> u_mailbox_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_mailbox_avmm_bridge_avmm_agent_m0_burstcount;                                // u_mailbox_avmm_bridge_avmm_agent:m0_burstcount -> u_mailbox_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_mailbox_avmm_bridge_avmm_agent_rf_source_valid;                              // u_mailbox_avmm_bridge_avmm_agent:rf_source_valid -> u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_mailbox_avmm_bridge_avmm_agent_rf_source_data;                               // u_mailbox_avmm_bridge_avmm_agent:rf_source_data -> u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_mailbox_avmm_bridge_avmm_agent_rf_source_ready;                              // u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_mailbox_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_mailbox_avmm_bridge_avmm_agent_rf_source_startofpacket;                      // u_mailbox_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_mailbox_avmm_bridge_avmm_agent_rf_source_endofpacket;                        // u_mailbox_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                           // u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_mailbox_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_data;                            // u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_mailbox_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                           // u_mailbox_avmm_bridge_avmm_agent:rf_sink_ready -> u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                   // u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_mailbox_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                     // u_mailbox_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_mailbox_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_007_src_valid;                                                         // cmd_mux_007:src_valid -> u_mailbox_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_007_src_data;                                                          // cmd_mux_007:src_data -> u_mailbox_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_007_src_ready;                                                         // u_mailbox_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_007:src_ready
	wire   [25:0] cmd_mux_007_src_channel;                                                       // cmd_mux_007:src_channel -> u_mailbox_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_007_src_startofpacket;                                                 // cmd_mux_007:src_startofpacket -> u_mailbox_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_007_src_endofpacket;                                                   // cmd_mux_007:src_endofpacket -> u_mailbox_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_rfnvram_smbus_master_avmm_agent_m0_readdata;                                 // u_rfnvram_smbus_master_avmm_translator:uav_readdata -> u_rfnvram_smbus_master_avmm_agent:m0_readdata
	wire          u_rfnvram_smbus_master_avmm_agent_m0_waitrequest;                              // u_rfnvram_smbus_master_avmm_translator:uav_waitrequest -> u_rfnvram_smbus_master_avmm_agent:m0_waitrequest
	wire          u_rfnvram_smbus_master_avmm_agent_m0_debugaccess;                              // u_rfnvram_smbus_master_avmm_agent:m0_debugaccess -> u_rfnvram_smbus_master_avmm_translator:uav_debugaccess
	wire   [31:0] u_rfnvram_smbus_master_avmm_agent_m0_address;                                  // u_rfnvram_smbus_master_avmm_agent:m0_address -> u_rfnvram_smbus_master_avmm_translator:uav_address
	wire    [3:0] u_rfnvram_smbus_master_avmm_agent_m0_byteenable;                               // u_rfnvram_smbus_master_avmm_agent:m0_byteenable -> u_rfnvram_smbus_master_avmm_translator:uav_byteenable
	wire          u_rfnvram_smbus_master_avmm_agent_m0_read;                                     // u_rfnvram_smbus_master_avmm_agent:m0_read -> u_rfnvram_smbus_master_avmm_translator:uav_read
	wire          u_rfnvram_smbus_master_avmm_agent_m0_readdatavalid;                            // u_rfnvram_smbus_master_avmm_translator:uav_readdatavalid -> u_rfnvram_smbus_master_avmm_agent:m0_readdatavalid
	wire          u_rfnvram_smbus_master_avmm_agent_m0_lock;                                     // u_rfnvram_smbus_master_avmm_agent:m0_lock -> u_rfnvram_smbus_master_avmm_translator:uav_lock
	wire   [31:0] u_rfnvram_smbus_master_avmm_agent_m0_writedata;                                // u_rfnvram_smbus_master_avmm_agent:m0_writedata -> u_rfnvram_smbus_master_avmm_translator:uav_writedata
	wire          u_rfnvram_smbus_master_avmm_agent_m0_write;                                    // u_rfnvram_smbus_master_avmm_agent:m0_write -> u_rfnvram_smbus_master_avmm_translator:uav_write
	wire    [2:0] u_rfnvram_smbus_master_avmm_agent_m0_burstcount;                               // u_rfnvram_smbus_master_avmm_agent:m0_burstcount -> u_rfnvram_smbus_master_avmm_translator:uav_burstcount
	wire          u_rfnvram_smbus_master_avmm_agent_rf_source_valid;                             // u_rfnvram_smbus_master_avmm_agent:rf_source_valid -> u_rfnvram_smbus_master_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_rfnvram_smbus_master_avmm_agent_rf_source_data;                              // u_rfnvram_smbus_master_avmm_agent:rf_source_data -> u_rfnvram_smbus_master_avmm_agent_rsp_fifo:in_data
	wire          u_rfnvram_smbus_master_avmm_agent_rf_source_ready;                             // u_rfnvram_smbus_master_avmm_agent_rsp_fifo:in_ready -> u_rfnvram_smbus_master_avmm_agent:rf_source_ready
	wire          u_rfnvram_smbus_master_avmm_agent_rf_source_startofpacket;                     // u_rfnvram_smbus_master_avmm_agent:rf_source_startofpacket -> u_rfnvram_smbus_master_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_rfnvram_smbus_master_avmm_agent_rf_source_endofpacket;                       // u_rfnvram_smbus_master_avmm_agent:rf_source_endofpacket -> u_rfnvram_smbus_master_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_valid;                          // u_rfnvram_smbus_master_avmm_agent_rsp_fifo:out_valid -> u_rfnvram_smbus_master_avmm_agent:rf_sink_valid
	wire  [117:0] u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_data;                           // u_rfnvram_smbus_master_avmm_agent_rsp_fifo:out_data -> u_rfnvram_smbus_master_avmm_agent:rf_sink_data
	wire          u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_ready;                          // u_rfnvram_smbus_master_avmm_agent:rf_sink_ready -> u_rfnvram_smbus_master_avmm_agent_rsp_fifo:out_ready
	wire          u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_startofpacket;                  // u_rfnvram_smbus_master_avmm_agent_rsp_fifo:out_startofpacket -> u_rfnvram_smbus_master_avmm_agent:rf_sink_startofpacket
	wire          u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_endofpacket;                    // u_rfnvram_smbus_master_avmm_agent_rsp_fifo:out_endofpacket -> u_rfnvram_smbus_master_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_008_src_valid;                                                         // cmd_mux_008:src_valid -> u_rfnvram_smbus_master_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_008_src_data;                                                          // cmd_mux_008:src_data -> u_rfnvram_smbus_master_avmm_agent:cp_data
	wire          cmd_mux_008_src_ready;                                                         // u_rfnvram_smbus_master_avmm_agent:cp_ready -> cmd_mux_008:src_ready
	wire   [25:0] cmd_mux_008_src_channel;                                                       // cmd_mux_008:src_channel -> u_rfnvram_smbus_master_avmm_agent:cp_channel
	wire          cmd_mux_008_src_startofpacket;                                                 // cmd_mux_008:src_startofpacket -> u_rfnvram_smbus_master_avmm_agent:cp_startofpacket
	wire          cmd_mux_008_src_endofpacket;                                                   // cmd_mux_008:src_endofpacket -> u_rfnvram_smbus_master_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_avmm_bridge_avmm_agent_m0_readdata;                               // u_spi_filter_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_waitrequest;                            // u_spi_filter_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_debugaccess;                            // u_spi_filter_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_avmm_bridge_avmm_agent_m0_address;                                // u_spi_filter_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_avmm_bridge_avmm_agent_m0_byteenable;                             // u_spi_filter_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_read;                                   // u_spi_filter_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_readdatavalid;                          // u_spi_filter_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_lock;                                   // u_spi_filter_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_avmm_bridge_avmm_agent_m0_writedata;                              // u_spi_filter_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_avmm_bridge_avmm_agent_m0_write;                                  // u_spi_filter_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_avmm_bridge_avmm_agent_m0_burstcount;                             // u_spi_filter_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_avmm_bridge_avmm_agent_rf_source_valid;                           // u_spi_filter_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_avmm_bridge_avmm_agent_rf_source_data;                            // u_spi_filter_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_avmm_bridge_avmm_agent_rf_source_ready;                           // u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_avmm_bridge_avmm_agent_rf_source_startofpacket;                   // u_spi_filter_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rf_source_endofpacket;                     // u_spi_filter_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                        // u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_data;                         // u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                        // u_spi_filter_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                // u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                  // u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                      // u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:in_valid
	wire   [33:0] u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_data;                       // u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_src_data -> u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:in_data
	wire          u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                      // u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:in_ready -> u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          cmd_mux_009_src_valid;                                                         // cmd_mux_009:src_valid -> u_spi_filter_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_009_src_data;                                                          // cmd_mux_009:src_data -> u_spi_filter_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_009_src_ready;                                                         // u_spi_filter_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_009:src_ready
	wire   [25:0] cmd_mux_009_src_channel;                                                       // cmd_mux_009:src_channel -> u_spi_filter_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_009_src_startofpacket;                                                 // cmd_mux_009:src_startofpacket -> u_spi_filter_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_009_src_endofpacket;                                                   // cmd_mux_009:src_endofpacket -> u_spi_filter_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_timer_bank_avmm_bridge_avmm_agent_m0_readdata;                               // u_timer_bank_avmm_bridge_avmm_translator:uav_readdata -> u_timer_bank_avmm_bridge_avmm_agent:m0_readdata
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_waitrequest;                            // u_timer_bank_avmm_bridge_avmm_translator:uav_waitrequest -> u_timer_bank_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_debugaccess;                            // u_timer_bank_avmm_bridge_avmm_agent:m0_debugaccess -> u_timer_bank_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_timer_bank_avmm_bridge_avmm_agent_m0_address;                                // u_timer_bank_avmm_bridge_avmm_agent:m0_address -> u_timer_bank_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_timer_bank_avmm_bridge_avmm_agent_m0_byteenable;                             // u_timer_bank_avmm_bridge_avmm_agent:m0_byteenable -> u_timer_bank_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_read;                                   // u_timer_bank_avmm_bridge_avmm_agent:m0_read -> u_timer_bank_avmm_bridge_avmm_translator:uav_read
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_readdatavalid;                          // u_timer_bank_avmm_bridge_avmm_translator:uav_readdatavalid -> u_timer_bank_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_lock;                                   // u_timer_bank_avmm_bridge_avmm_agent:m0_lock -> u_timer_bank_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_timer_bank_avmm_bridge_avmm_agent_m0_writedata;                              // u_timer_bank_avmm_bridge_avmm_agent:m0_writedata -> u_timer_bank_avmm_bridge_avmm_translator:uav_writedata
	wire          u_timer_bank_avmm_bridge_avmm_agent_m0_write;                                  // u_timer_bank_avmm_bridge_avmm_agent:m0_write -> u_timer_bank_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_timer_bank_avmm_bridge_avmm_agent_m0_burstcount;                             // u_timer_bank_avmm_bridge_avmm_agent:m0_burstcount -> u_timer_bank_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_timer_bank_avmm_bridge_avmm_agent_rf_source_valid;                           // u_timer_bank_avmm_bridge_avmm_agent:rf_source_valid -> u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_timer_bank_avmm_bridge_avmm_agent_rf_source_data;                            // u_timer_bank_avmm_bridge_avmm_agent:rf_source_data -> u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_timer_bank_avmm_bridge_avmm_agent_rf_source_ready;                           // u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_timer_bank_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_timer_bank_avmm_bridge_avmm_agent_rf_source_startofpacket;                   // u_timer_bank_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_timer_bank_avmm_bridge_avmm_agent_rf_source_endofpacket;                     // u_timer_bank_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                        // u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_timer_bank_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_data;                         // u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_timer_bank_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                        // u_timer_bank_avmm_bridge_avmm_agent:rf_sink_ready -> u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                // u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_timer_bank_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                  // u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_timer_bank_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_010_src_valid;                                                         // cmd_mux_010:src_valid -> u_timer_bank_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_010_src_data;                                                          // cmd_mux_010:src_data -> u_timer_bank_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_010_src_ready;                                                         // u_timer_bank_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_010:src_ready
	wire   [25:0] cmd_mux_010_src_channel;                                                       // cmd_mux_010:src_channel -> u_timer_bank_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_010_src_startofpacket;                                                 // cmd_mux_010:src_startofpacket -> u_timer_bank_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_010_src_endofpacket;                                                   // cmd_mux_010:src_endofpacket -> u_timer_bank_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_crypto_dma_avmm_bridge_avmm_agent_m0_readdata;                               // u_crypto_dma_avmm_bridge_avmm_translator:uav_readdata -> u_crypto_dma_avmm_bridge_avmm_agent:m0_readdata
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_waitrequest;                            // u_crypto_dma_avmm_bridge_avmm_translator:uav_waitrequest -> u_crypto_dma_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_debugaccess;                            // u_crypto_dma_avmm_bridge_avmm_agent:m0_debugaccess -> u_crypto_dma_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_crypto_dma_avmm_bridge_avmm_agent_m0_address;                                // u_crypto_dma_avmm_bridge_avmm_agent:m0_address -> u_crypto_dma_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_crypto_dma_avmm_bridge_avmm_agent_m0_byteenable;                             // u_crypto_dma_avmm_bridge_avmm_agent:m0_byteenable -> u_crypto_dma_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_read;                                   // u_crypto_dma_avmm_bridge_avmm_agent:m0_read -> u_crypto_dma_avmm_bridge_avmm_translator:uav_read
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_readdatavalid;                          // u_crypto_dma_avmm_bridge_avmm_translator:uav_readdatavalid -> u_crypto_dma_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_lock;                                   // u_crypto_dma_avmm_bridge_avmm_agent:m0_lock -> u_crypto_dma_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_crypto_dma_avmm_bridge_avmm_agent_m0_writedata;                              // u_crypto_dma_avmm_bridge_avmm_agent:m0_writedata -> u_crypto_dma_avmm_bridge_avmm_translator:uav_writedata
	wire          u_crypto_dma_avmm_bridge_avmm_agent_m0_write;                                  // u_crypto_dma_avmm_bridge_avmm_agent:m0_write -> u_crypto_dma_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_crypto_dma_avmm_bridge_avmm_agent_m0_burstcount;                             // u_crypto_dma_avmm_bridge_avmm_agent:m0_burstcount -> u_crypto_dma_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rf_source_valid;                           // u_crypto_dma_avmm_bridge_avmm_agent:rf_source_valid -> u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_crypto_dma_avmm_bridge_avmm_agent_rf_source_data;                            // u_crypto_dma_avmm_bridge_avmm_agent:rf_source_data -> u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rf_source_ready;                           // u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_crypto_dma_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rf_source_startofpacket;                   // u_crypto_dma_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rf_source_endofpacket;                     // u_crypto_dma_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                        // u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_crypto_dma_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_data;                         // u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_crypto_dma_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                        // u_crypto_dma_avmm_bridge_avmm_agent:rf_sink_ready -> u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                // u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_crypto_dma_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                  // u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_crypto_dma_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_011_src_valid;                                                         // cmd_mux_011:src_valid -> u_crypto_dma_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_011_src_data;                                                          // cmd_mux_011:src_data -> u_crypto_dma_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_011_src_ready;                                                         // u_crypto_dma_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_011:src_ready
	wire   [25:0] cmd_mux_011_src_channel;                                                       // cmd_mux_011:src_channel -> u_crypto_dma_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_011_src_startofpacket;                                                 // cmd_mux_011:src_startofpacket -> u_crypto_dma_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_011_src_endofpacket;                                                   // cmd_mux_011:src_endofpacket -> u_crypto_dma_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_crypto_avmm_bridge_avmm_agent_m0_readdata;                                   // u_crypto_avmm_bridge_avmm_translator:uav_readdata -> u_crypto_avmm_bridge_avmm_agent:m0_readdata
	wire          u_crypto_avmm_bridge_avmm_agent_m0_waitrequest;                                // u_crypto_avmm_bridge_avmm_translator:uav_waitrequest -> u_crypto_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_crypto_avmm_bridge_avmm_agent_m0_debugaccess;                                // u_crypto_avmm_bridge_avmm_agent:m0_debugaccess -> u_crypto_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_crypto_avmm_bridge_avmm_agent_m0_address;                                    // u_crypto_avmm_bridge_avmm_agent:m0_address -> u_crypto_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_crypto_avmm_bridge_avmm_agent_m0_byteenable;                                 // u_crypto_avmm_bridge_avmm_agent:m0_byteenable -> u_crypto_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_crypto_avmm_bridge_avmm_agent_m0_read;                                       // u_crypto_avmm_bridge_avmm_agent:m0_read -> u_crypto_avmm_bridge_avmm_translator:uav_read
	wire          u_crypto_avmm_bridge_avmm_agent_m0_readdatavalid;                              // u_crypto_avmm_bridge_avmm_translator:uav_readdatavalid -> u_crypto_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_crypto_avmm_bridge_avmm_agent_m0_lock;                                       // u_crypto_avmm_bridge_avmm_agent:m0_lock -> u_crypto_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_crypto_avmm_bridge_avmm_agent_m0_writedata;                                  // u_crypto_avmm_bridge_avmm_agent:m0_writedata -> u_crypto_avmm_bridge_avmm_translator:uav_writedata
	wire          u_crypto_avmm_bridge_avmm_agent_m0_write;                                      // u_crypto_avmm_bridge_avmm_agent:m0_write -> u_crypto_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_crypto_avmm_bridge_avmm_agent_m0_burstcount;                                 // u_crypto_avmm_bridge_avmm_agent:m0_burstcount -> u_crypto_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_crypto_avmm_bridge_avmm_agent_rf_source_valid;                               // u_crypto_avmm_bridge_avmm_agent:rf_source_valid -> u_crypto_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_crypto_avmm_bridge_avmm_agent_rf_source_data;                                // u_crypto_avmm_bridge_avmm_agent:rf_source_data -> u_crypto_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_crypto_avmm_bridge_avmm_agent_rf_source_ready;                               // u_crypto_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_crypto_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_crypto_avmm_bridge_avmm_agent_rf_source_startofpacket;                       // u_crypto_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_crypto_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_crypto_avmm_bridge_avmm_agent_rf_source_endofpacket;                         // u_crypto_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_crypto_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                            // u_crypto_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_crypto_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_data;                             // u_crypto_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_crypto_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                            // u_crypto_avmm_bridge_avmm_agent:rf_sink_ready -> u_crypto_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                    // u_crypto_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_crypto_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                      // u_crypto_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_crypto_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_012_src_valid;                                                         // cmd_mux_012:src_valid -> u_crypto_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_012_src_data;                                                          // cmd_mux_012:src_data -> u_crypto_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_012_src_ready;                                                         // u_crypto_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_012:src_ready
	wire   [25:0] cmd_mux_012_src_channel;                                                       // cmd_mux_012:src_channel -> u_crypto_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_012_src_startofpacket;                                                 // cmd_mux_012:src_startofpacket -> u_crypto_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_012_src_endofpacket;                                                   // cmd_mux_012:src_endofpacket -> u_crypto_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdata;                        // u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_waitrequest;                     // u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_debugaccess;                     // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_address;                         // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_byteenable;                      // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_read;                            // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdatavalid;                   // u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_lock;                            // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_writedata;                       // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_write;                           // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_burstcount;                      // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_bmc_we_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_valid;                    // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_data;                     // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_ready;                    // u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_startofpacket;            // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_endofpacket;              // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                 // u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_data;                  // u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                 // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;         // u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;           // u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_013_src_valid;                                                         // cmd_mux_013:src_valid -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_013_src_data;                                                          // cmd_mux_013:src_data -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_013_src_ready;                                                         // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_013:src_ready
	wire   [25:0] cmd_mux_013_src_channel;                                                       // cmd_mux_013:src_channel -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_013_src_startofpacket;                                                 // cmd_mux_013:src_startofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_013_src_endofpacket;                                                   // cmd_mux_013:src_endofpacket -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdata;                // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest;             // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess;             // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_address;                 // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_byteenable;              // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_read;                    // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid;           // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_lock;                    // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_writedata;               // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_write;                   // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_burstcount;              // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_valid;            // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_data;             // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_ready;            // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket;    // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket;      // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid;         // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data;          // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready;         // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket; // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;   // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_014_src_valid;                                                         // cmd_mux_014:src_valid -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_014_src_data;                                                          // cmd_mux_014:src_data -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_014_src_ready;                                                         // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_014:src_ready
	wire   [25:0] cmd_mux_014_src_channel;                                                       // cmd_mux_014:src_channel -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_014_src_startofpacket;                                                 // cmd_mux_014:src_startofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_014_src_endofpacket;                                                   // cmd_mux_014:src_endofpacket -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_i3c_avmm_bridge_avmm_agent_m0_readdata;                                      // u_i3c_avmm_bridge_avmm_translator:uav_readdata -> u_i3c_avmm_bridge_avmm_agent:m0_readdata
	wire          u_i3c_avmm_bridge_avmm_agent_m0_waitrequest;                                   // u_i3c_avmm_bridge_avmm_translator:uav_waitrequest -> u_i3c_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_i3c_avmm_bridge_avmm_agent_m0_debugaccess;                                   // u_i3c_avmm_bridge_avmm_agent:m0_debugaccess -> u_i3c_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_i3c_avmm_bridge_avmm_agent_m0_address;                                       // u_i3c_avmm_bridge_avmm_agent:m0_address -> u_i3c_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_i3c_avmm_bridge_avmm_agent_m0_byteenable;                                    // u_i3c_avmm_bridge_avmm_agent:m0_byteenable -> u_i3c_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_i3c_avmm_bridge_avmm_agent_m0_read;                                          // u_i3c_avmm_bridge_avmm_agent:m0_read -> u_i3c_avmm_bridge_avmm_translator:uav_read
	wire          u_i3c_avmm_bridge_avmm_agent_m0_readdatavalid;                                 // u_i3c_avmm_bridge_avmm_translator:uav_readdatavalid -> u_i3c_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_i3c_avmm_bridge_avmm_agent_m0_lock;                                          // u_i3c_avmm_bridge_avmm_agent:m0_lock -> u_i3c_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_i3c_avmm_bridge_avmm_agent_m0_writedata;                                     // u_i3c_avmm_bridge_avmm_agent:m0_writedata -> u_i3c_avmm_bridge_avmm_translator:uav_writedata
	wire          u_i3c_avmm_bridge_avmm_agent_m0_write;                                         // u_i3c_avmm_bridge_avmm_agent:m0_write -> u_i3c_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_i3c_avmm_bridge_avmm_agent_m0_burstcount;                                    // u_i3c_avmm_bridge_avmm_agent:m0_burstcount -> u_i3c_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_i3c_avmm_bridge_avmm_agent_rf_source_valid;                                  // u_i3c_avmm_bridge_avmm_agent:rf_source_valid -> u_i3c_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_i3c_avmm_bridge_avmm_agent_rf_source_data;                                   // u_i3c_avmm_bridge_avmm_agent:rf_source_data -> u_i3c_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_i3c_avmm_bridge_avmm_agent_rf_source_ready;                                  // u_i3c_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_i3c_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_i3c_avmm_bridge_avmm_agent_rf_source_startofpacket;                          // u_i3c_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_i3c_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rf_source_endofpacket;                            // u_i3c_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_i3c_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                               // u_i3c_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_i3c_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_data;                                // u_i3c_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_i3c_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                               // u_i3c_avmm_bridge_avmm_agent:rf_sink_ready -> u_i3c_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                       // u_i3c_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_i3c_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                         // u_i3c_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_i3c_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                             // u_i3c_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> u_i3c_avmm_bridge_avmm_agent_rdata_fifo:in_valid
	wire   [33:0] u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_data;                              // u_i3c_avmm_bridge_avmm_agent:rdata_fifo_src_data -> u_i3c_avmm_bridge_avmm_agent_rdata_fifo:in_data
	wire          u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                             // u_i3c_avmm_bridge_avmm_agent_rdata_fifo:in_ready -> u_i3c_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          cmd_mux_015_src_valid;                                                         // cmd_mux_015:src_valid -> u_i3c_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_015_src_data;                                                          // cmd_mux_015:src_data -> u_i3c_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_015_src_ready;                                                         // u_i3c_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_015:src_ready
	wire   [25:0] cmd_mux_015_src_channel;                                                       // cmd_mux_015:src_channel -> u_i3c_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_015_src_startofpacket;                                                 // cmd_mux_015:src_startofpacket -> u_i3c_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_015_src_endofpacket;                                                   // cmd_mux_015:src_endofpacket -> u_i3c_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdata;                // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest;             // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess;             // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_address;                 // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_byteenable;              // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_read;                    // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid;           // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_lock;                    // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_writedata;               // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_write;                   // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_burstcount;              // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_valid;            // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_data;             // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_ready;            // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket;    // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket;      // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid;         // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data;          // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready;         // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket; // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;   // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_016_src_valid;                                                         // cmd_mux_016:src_valid -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_016_src_data;                                                          // cmd_mux_016:src_data -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_016_src_ready;                                                         // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_016:src_ready
	wire   [25:0] cmd_mux_016_src_channel;                                                       // cmd_mux_016:src_channel -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_016_src_startofpacket;                                                 // cmd_mux_016:src_startofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_016_src_endofpacket;                                                   // cmd_mux_016:src_endofpacket -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdata;                // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest;             // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess;             // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_address;                 // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_byteenable;              // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_read;                    // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid;           // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_lock;                    // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_writedata;               // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_write;                   // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_burstcount;              // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_valid;            // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_data;             // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_ready;            // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket;    // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket;      // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid;         // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data;          // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready;         // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket; // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;   // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_017_src_valid;                                                         // cmd_mux_017:src_valid -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_017_src_data;                                                          // cmd_mux_017:src_data -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_017_src_ready;                                                         // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_017:src_ready
	wire   [25:0] cmd_mux_017_src_channel;                                                       // cmd_mux_017:src_channel -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_017_src_startofpacket;                                                 // cmd_mux_017:src_startofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_017_src_endofpacket;                                                   // cmd_mux_017:src_endofpacket -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdata;                // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_readdata -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_readdata
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest;             // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_waitrequest -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess;             // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_debugaccess -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_address;                 // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_address -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_byteenable;              // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_byteenable -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_read;                    // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_read -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_read
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid;           // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_readdatavalid -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_lock;                    // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_lock -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_writedata;               // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_writedata -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_writedata
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_write;                   // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_write -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_burstcount;              // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:m0_burstcount -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_valid;            // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_source_valid -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_data;             // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_source_data -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_ready;            // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket;    // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket;      // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid;         // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data;          // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready;         // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_sink_ready -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket; // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;   // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_018_src_valid;                                                         // cmd_mux_018:src_valid -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_018_src_data;                                                          // cmd_mux_018:src_data -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_018_src_ready;                                                         // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_018:src_ready
	wire   [25:0] cmd_mux_018_src_channel;                                                       // cmd_mux_018:src_channel -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_018_src_startofpacket;                                                 // cmd_mux_018:src_startofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_018_src_endofpacket;                                                   // cmd_mux_018:src_endofpacket -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_relay2_avmm_bridge_avmm_agent_m0_readdata;                                   // u_relay2_avmm_bridge_avmm_translator:uav_readdata -> u_relay2_avmm_bridge_avmm_agent:m0_readdata
	wire          u_relay2_avmm_bridge_avmm_agent_m0_waitrequest;                                // u_relay2_avmm_bridge_avmm_translator:uav_waitrequest -> u_relay2_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_relay2_avmm_bridge_avmm_agent_m0_debugaccess;                                // u_relay2_avmm_bridge_avmm_agent:m0_debugaccess -> u_relay2_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_relay2_avmm_bridge_avmm_agent_m0_address;                                    // u_relay2_avmm_bridge_avmm_agent:m0_address -> u_relay2_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_relay2_avmm_bridge_avmm_agent_m0_byteenable;                                 // u_relay2_avmm_bridge_avmm_agent:m0_byteenable -> u_relay2_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_relay2_avmm_bridge_avmm_agent_m0_read;                                       // u_relay2_avmm_bridge_avmm_agent:m0_read -> u_relay2_avmm_bridge_avmm_translator:uav_read
	wire          u_relay2_avmm_bridge_avmm_agent_m0_readdatavalid;                              // u_relay2_avmm_bridge_avmm_translator:uav_readdatavalid -> u_relay2_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_relay2_avmm_bridge_avmm_agent_m0_lock;                                       // u_relay2_avmm_bridge_avmm_agent:m0_lock -> u_relay2_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_relay2_avmm_bridge_avmm_agent_m0_writedata;                                  // u_relay2_avmm_bridge_avmm_agent:m0_writedata -> u_relay2_avmm_bridge_avmm_translator:uav_writedata
	wire          u_relay2_avmm_bridge_avmm_agent_m0_write;                                      // u_relay2_avmm_bridge_avmm_agent:m0_write -> u_relay2_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_relay2_avmm_bridge_avmm_agent_m0_burstcount;                                 // u_relay2_avmm_bridge_avmm_agent:m0_burstcount -> u_relay2_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_relay2_avmm_bridge_avmm_agent_rf_source_valid;                               // u_relay2_avmm_bridge_avmm_agent:rf_source_valid -> u_relay2_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_relay2_avmm_bridge_avmm_agent_rf_source_data;                                // u_relay2_avmm_bridge_avmm_agent:rf_source_data -> u_relay2_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_relay2_avmm_bridge_avmm_agent_rf_source_ready;                               // u_relay2_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_relay2_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_relay2_avmm_bridge_avmm_agent_rf_source_startofpacket;                       // u_relay2_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_relay2_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_relay2_avmm_bridge_avmm_agent_rf_source_endofpacket;                         // u_relay2_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_relay2_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                            // u_relay2_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_relay2_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_data;                             // u_relay2_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_relay2_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                            // u_relay2_avmm_bridge_avmm_agent:rf_sink_ready -> u_relay2_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                    // u_relay2_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_relay2_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                      // u_relay2_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_relay2_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_019_src_valid;                                                         // cmd_mux_019:src_valid -> u_relay2_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_019_src_data;                                                          // cmd_mux_019:src_data -> u_relay2_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_019_src_ready;                                                         // u_relay2_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_019:src_ready
	wire   [25:0] cmd_mux_019_src_channel;                                                       // cmd_mux_019:src_channel -> u_relay2_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_019_src_startofpacket;                                                 // cmd_mux_019:src_startofpacket -> u_relay2_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_019_src_endofpacket;                                                   // cmd_mux_019:src_endofpacket -> u_relay2_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_aes_avmm_bridge_avmm_agent_m0_readdata;                                      // u_aes_avmm_bridge_avmm_translator:uav_readdata -> u_aes_avmm_bridge_avmm_agent:m0_readdata
	wire          u_aes_avmm_bridge_avmm_agent_m0_waitrequest;                                   // u_aes_avmm_bridge_avmm_translator:uav_waitrequest -> u_aes_avmm_bridge_avmm_agent:m0_waitrequest
	wire          u_aes_avmm_bridge_avmm_agent_m0_debugaccess;                                   // u_aes_avmm_bridge_avmm_agent:m0_debugaccess -> u_aes_avmm_bridge_avmm_translator:uav_debugaccess
	wire   [31:0] u_aes_avmm_bridge_avmm_agent_m0_address;                                       // u_aes_avmm_bridge_avmm_agent:m0_address -> u_aes_avmm_bridge_avmm_translator:uav_address
	wire    [3:0] u_aes_avmm_bridge_avmm_agent_m0_byteenable;                                    // u_aes_avmm_bridge_avmm_agent:m0_byteenable -> u_aes_avmm_bridge_avmm_translator:uav_byteenable
	wire          u_aes_avmm_bridge_avmm_agent_m0_read;                                          // u_aes_avmm_bridge_avmm_agent:m0_read -> u_aes_avmm_bridge_avmm_translator:uav_read
	wire          u_aes_avmm_bridge_avmm_agent_m0_readdatavalid;                                 // u_aes_avmm_bridge_avmm_translator:uav_readdatavalid -> u_aes_avmm_bridge_avmm_agent:m0_readdatavalid
	wire          u_aes_avmm_bridge_avmm_agent_m0_lock;                                          // u_aes_avmm_bridge_avmm_agent:m0_lock -> u_aes_avmm_bridge_avmm_translator:uav_lock
	wire   [31:0] u_aes_avmm_bridge_avmm_agent_m0_writedata;                                     // u_aes_avmm_bridge_avmm_agent:m0_writedata -> u_aes_avmm_bridge_avmm_translator:uav_writedata
	wire          u_aes_avmm_bridge_avmm_agent_m0_write;                                         // u_aes_avmm_bridge_avmm_agent:m0_write -> u_aes_avmm_bridge_avmm_translator:uav_write
	wire    [2:0] u_aes_avmm_bridge_avmm_agent_m0_burstcount;                                    // u_aes_avmm_bridge_avmm_agent:m0_burstcount -> u_aes_avmm_bridge_avmm_translator:uav_burstcount
	wire          u_aes_avmm_bridge_avmm_agent_rf_source_valid;                                  // u_aes_avmm_bridge_avmm_agent:rf_source_valid -> u_aes_avmm_bridge_avmm_agent_rsp_fifo:in_valid
	wire  [117:0] u_aes_avmm_bridge_avmm_agent_rf_source_data;                                   // u_aes_avmm_bridge_avmm_agent:rf_source_data -> u_aes_avmm_bridge_avmm_agent_rsp_fifo:in_data
	wire          u_aes_avmm_bridge_avmm_agent_rf_source_ready;                                  // u_aes_avmm_bridge_avmm_agent_rsp_fifo:in_ready -> u_aes_avmm_bridge_avmm_agent:rf_source_ready
	wire          u_aes_avmm_bridge_avmm_agent_rf_source_startofpacket;                          // u_aes_avmm_bridge_avmm_agent:rf_source_startofpacket -> u_aes_avmm_bridge_avmm_agent_rsp_fifo:in_startofpacket
	wire          u_aes_avmm_bridge_avmm_agent_rf_source_endofpacket;                            // u_aes_avmm_bridge_avmm_agent:rf_source_endofpacket -> u_aes_avmm_bridge_avmm_agent_rsp_fifo:in_endofpacket
	wire          u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_valid;                               // u_aes_avmm_bridge_avmm_agent_rsp_fifo:out_valid -> u_aes_avmm_bridge_avmm_agent:rf_sink_valid
	wire  [117:0] u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_data;                                // u_aes_avmm_bridge_avmm_agent_rsp_fifo:out_data -> u_aes_avmm_bridge_avmm_agent:rf_sink_data
	wire          u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_ready;                               // u_aes_avmm_bridge_avmm_agent:rf_sink_ready -> u_aes_avmm_bridge_avmm_agent_rsp_fifo:out_ready
	wire          u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket;                       // u_aes_avmm_bridge_avmm_agent_rsp_fifo:out_startofpacket -> u_aes_avmm_bridge_avmm_agent:rf_sink_startofpacket
	wire          u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket;                         // u_aes_avmm_bridge_avmm_agent_rsp_fifo:out_endofpacket -> u_aes_avmm_bridge_avmm_agent:rf_sink_endofpacket
	wire          cmd_mux_020_src_valid;                                                         // cmd_mux_020:src_valid -> u_aes_avmm_bridge_avmm_agent:cp_valid
	wire  [116:0] cmd_mux_020_src_data;                                                          // cmd_mux_020:src_data -> u_aes_avmm_bridge_avmm_agent:cp_data
	wire          cmd_mux_020_src_ready;                                                         // u_aes_avmm_bridge_avmm_agent:cp_ready -> cmd_mux_020:src_ready
	wire   [25:0] cmd_mux_020_src_channel;                                                       // cmd_mux_020:src_channel -> u_aes_avmm_bridge_avmm_agent:cp_channel
	wire          cmd_mux_020_src_startofpacket;                                                 // cmd_mux_020:src_startofpacket -> u_aes_avmm_bridge_avmm_agent:cp_startofpacket
	wire          cmd_mux_020_src_endofpacket;                                                   // cmd_mux_020:src_endofpacket -> u_aes_avmm_bridge_avmm_agent:cp_endofpacket
	wire   [31:0] u_ufm_csr_agent_m0_readdata;                                                   // u_ufm_csr_translator:uav_readdata -> u_ufm_csr_agent:m0_readdata
	wire          u_ufm_csr_agent_m0_waitrequest;                                                // u_ufm_csr_translator:uav_waitrequest -> u_ufm_csr_agent:m0_waitrequest
	wire          u_ufm_csr_agent_m0_debugaccess;                                                // u_ufm_csr_agent:m0_debugaccess -> u_ufm_csr_translator:uav_debugaccess
	wire   [31:0] u_ufm_csr_agent_m0_address;                                                    // u_ufm_csr_agent:m0_address -> u_ufm_csr_translator:uav_address
	wire    [3:0] u_ufm_csr_agent_m0_byteenable;                                                 // u_ufm_csr_agent:m0_byteenable -> u_ufm_csr_translator:uav_byteenable
	wire          u_ufm_csr_agent_m0_read;                                                       // u_ufm_csr_agent:m0_read -> u_ufm_csr_translator:uav_read
	wire          u_ufm_csr_agent_m0_readdatavalid;                                              // u_ufm_csr_translator:uav_readdatavalid -> u_ufm_csr_agent:m0_readdatavalid
	wire          u_ufm_csr_agent_m0_lock;                                                       // u_ufm_csr_agent:m0_lock -> u_ufm_csr_translator:uav_lock
	wire   [31:0] u_ufm_csr_agent_m0_writedata;                                                  // u_ufm_csr_agent:m0_writedata -> u_ufm_csr_translator:uav_writedata
	wire          u_ufm_csr_agent_m0_write;                                                      // u_ufm_csr_agent:m0_write -> u_ufm_csr_translator:uav_write
	wire    [2:0] u_ufm_csr_agent_m0_burstcount;                                                 // u_ufm_csr_agent:m0_burstcount -> u_ufm_csr_translator:uav_burstcount
	wire          u_ufm_csr_agent_rf_source_valid;                                               // u_ufm_csr_agent:rf_source_valid -> u_ufm_csr_agent_rsp_fifo:in_valid
	wire  [117:0] u_ufm_csr_agent_rf_source_data;                                                // u_ufm_csr_agent:rf_source_data -> u_ufm_csr_agent_rsp_fifo:in_data
	wire          u_ufm_csr_agent_rf_source_ready;                                               // u_ufm_csr_agent_rsp_fifo:in_ready -> u_ufm_csr_agent:rf_source_ready
	wire          u_ufm_csr_agent_rf_source_startofpacket;                                       // u_ufm_csr_agent:rf_source_startofpacket -> u_ufm_csr_agent_rsp_fifo:in_startofpacket
	wire          u_ufm_csr_agent_rf_source_endofpacket;                                         // u_ufm_csr_agent:rf_source_endofpacket -> u_ufm_csr_agent_rsp_fifo:in_endofpacket
	wire          u_ufm_csr_agent_rsp_fifo_out_valid;                                            // u_ufm_csr_agent_rsp_fifo:out_valid -> u_ufm_csr_agent:rf_sink_valid
	wire  [117:0] u_ufm_csr_agent_rsp_fifo_out_data;                                             // u_ufm_csr_agent_rsp_fifo:out_data -> u_ufm_csr_agent:rf_sink_data
	wire          u_ufm_csr_agent_rsp_fifo_out_ready;                                            // u_ufm_csr_agent:rf_sink_ready -> u_ufm_csr_agent_rsp_fifo:out_ready
	wire          u_ufm_csr_agent_rsp_fifo_out_startofpacket;                                    // u_ufm_csr_agent_rsp_fifo:out_startofpacket -> u_ufm_csr_agent:rf_sink_startofpacket
	wire          u_ufm_csr_agent_rsp_fifo_out_endofpacket;                                      // u_ufm_csr_agent_rsp_fifo:out_endofpacket -> u_ufm_csr_agent:rf_sink_endofpacket
	wire          cmd_mux_021_src_valid;                                                         // cmd_mux_021:src_valid -> u_ufm_csr_agent:cp_valid
	wire  [116:0] cmd_mux_021_src_data;                                                          // cmd_mux_021:src_data -> u_ufm_csr_agent:cp_data
	wire          cmd_mux_021_src_ready;                                                         // u_ufm_csr_agent:cp_ready -> cmd_mux_021:src_ready
	wire   [25:0] cmd_mux_021_src_channel;                                                       // cmd_mux_021:src_channel -> u_ufm_csr_agent:cp_channel
	wire          cmd_mux_021_src_startofpacket;                                                 // cmd_mux_021:src_startofpacket -> u_ufm_csr_agent:cp_startofpacket
	wire          cmd_mux_021_src_endofpacket;                                                   // cmd_mux_021:src_endofpacket -> u_ufm_csr_agent:cp_endofpacket
	wire   [31:0] u_global_state_reg_s1_agent_m0_readdata;                                       // u_global_state_reg_s1_translator:uav_readdata -> u_global_state_reg_s1_agent:m0_readdata
	wire          u_global_state_reg_s1_agent_m0_waitrequest;                                    // u_global_state_reg_s1_translator:uav_waitrequest -> u_global_state_reg_s1_agent:m0_waitrequest
	wire          u_global_state_reg_s1_agent_m0_debugaccess;                                    // u_global_state_reg_s1_agent:m0_debugaccess -> u_global_state_reg_s1_translator:uav_debugaccess
	wire   [31:0] u_global_state_reg_s1_agent_m0_address;                                        // u_global_state_reg_s1_agent:m0_address -> u_global_state_reg_s1_translator:uav_address
	wire    [3:0] u_global_state_reg_s1_agent_m0_byteenable;                                     // u_global_state_reg_s1_agent:m0_byteenable -> u_global_state_reg_s1_translator:uav_byteenable
	wire          u_global_state_reg_s1_agent_m0_read;                                           // u_global_state_reg_s1_agent:m0_read -> u_global_state_reg_s1_translator:uav_read
	wire          u_global_state_reg_s1_agent_m0_readdatavalid;                                  // u_global_state_reg_s1_translator:uav_readdatavalid -> u_global_state_reg_s1_agent:m0_readdatavalid
	wire          u_global_state_reg_s1_agent_m0_lock;                                           // u_global_state_reg_s1_agent:m0_lock -> u_global_state_reg_s1_translator:uav_lock
	wire   [31:0] u_global_state_reg_s1_agent_m0_writedata;                                      // u_global_state_reg_s1_agent:m0_writedata -> u_global_state_reg_s1_translator:uav_writedata
	wire          u_global_state_reg_s1_agent_m0_write;                                          // u_global_state_reg_s1_agent:m0_write -> u_global_state_reg_s1_translator:uav_write
	wire    [2:0] u_global_state_reg_s1_agent_m0_burstcount;                                     // u_global_state_reg_s1_agent:m0_burstcount -> u_global_state_reg_s1_translator:uav_burstcount
	wire          u_global_state_reg_s1_agent_rf_source_valid;                                   // u_global_state_reg_s1_agent:rf_source_valid -> u_global_state_reg_s1_agent_rsp_fifo:in_valid
	wire  [117:0] u_global_state_reg_s1_agent_rf_source_data;                                    // u_global_state_reg_s1_agent:rf_source_data -> u_global_state_reg_s1_agent_rsp_fifo:in_data
	wire          u_global_state_reg_s1_agent_rf_source_ready;                                   // u_global_state_reg_s1_agent_rsp_fifo:in_ready -> u_global_state_reg_s1_agent:rf_source_ready
	wire          u_global_state_reg_s1_agent_rf_source_startofpacket;                           // u_global_state_reg_s1_agent:rf_source_startofpacket -> u_global_state_reg_s1_agent_rsp_fifo:in_startofpacket
	wire          u_global_state_reg_s1_agent_rf_source_endofpacket;                             // u_global_state_reg_s1_agent:rf_source_endofpacket -> u_global_state_reg_s1_agent_rsp_fifo:in_endofpacket
	wire          u_global_state_reg_s1_agent_rsp_fifo_out_valid;                                // u_global_state_reg_s1_agent_rsp_fifo:out_valid -> u_global_state_reg_s1_agent:rf_sink_valid
	wire  [117:0] u_global_state_reg_s1_agent_rsp_fifo_out_data;                                 // u_global_state_reg_s1_agent_rsp_fifo:out_data -> u_global_state_reg_s1_agent:rf_sink_data
	wire          u_global_state_reg_s1_agent_rsp_fifo_out_ready;                                // u_global_state_reg_s1_agent:rf_sink_ready -> u_global_state_reg_s1_agent_rsp_fifo:out_ready
	wire          u_global_state_reg_s1_agent_rsp_fifo_out_startofpacket;                        // u_global_state_reg_s1_agent_rsp_fifo:out_startofpacket -> u_global_state_reg_s1_agent:rf_sink_startofpacket
	wire          u_global_state_reg_s1_agent_rsp_fifo_out_endofpacket;                          // u_global_state_reg_s1_agent_rsp_fifo:out_endofpacket -> u_global_state_reg_s1_agent:rf_sink_endofpacket
	wire          cmd_mux_022_src_valid;                                                         // cmd_mux_022:src_valid -> u_global_state_reg_s1_agent:cp_valid
	wire  [116:0] cmd_mux_022_src_data;                                                          // cmd_mux_022:src_data -> u_global_state_reg_s1_agent:cp_data
	wire          cmd_mux_022_src_ready;                                                         // u_global_state_reg_s1_agent:cp_ready -> cmd_mux_022:src_ready
	wire   [25:0] cmd_mux_022_src_channel;                                                       // cmd_mux_022:src_channel -> u_global_state_reg_s1_agent:cp_channel
	wire          cmd_mux_022_src_startofpacket;                                                 // cmd_mux_022:src_startofpacket -> u_global_state_reg_s1_agent:cp_startofpacket
	wire          cmd_mux_022_src_endofpacket;                                                   // cmd_mux_022:src_endofpacket -> u_global_state_reg_s1_agent:cp_endofpacket
	wire   [31:0] u_gpo_1_s1_agent_m0_readdata;                                                  // u_gpo_1_s1_translator:uav_readdata -> u_gpo_1_s1_agent:m0_readdata
	wire          u_gpo_1_s1_agent_m0_waitrequest;                                               // u_gpo_1_s1_translator:uav_waitrequest -> u_gpo_1_s1_agent:m0_waitrequest
	wire          u_gpo_1_s1_agent_m0_debugaccess;                                               // u_gpo_1_s1_agent:m0_debugaccess -> u_gpo_1_s1_translator:uav_debugaccess
	wire   [31:0] u_gpo_1_s1_agent_m0_address;                                                   // u_gpo_1_s1_agent:m0_address -> u_gpo_1_s1_translator:uav_address
	wire    [3:0] u_gpo_1_s1_agent_m0_byteenable;                                                // u_gpo_1_s1_agent:m0_byteenable -> u_gpo_1_s1_translator:uav_byteenable
	wire          u_gpo_1_s1_agent_m0_read;                                                      // u_gpo_1_s1_agent:m0_read -> u_gpo_1_s1_translator:uav_read
	wire          u_gpo_1_s1_agent_m0_readdatavalid;                                             // u_gpo_1_s1_translator:uav_readdatavalid -> u_gpo_1_s1_agent:m0_readdatavalid
	wire          u_gpo_1_s1_agent_m0_lock;                                                      // u_gpo_1_s1_agent:m0_lock -> u_gpo_1_s1_translator:uav_lock
	wire   [31:0] u_gpo_1_s1_agent_m0_writedata;                                                 // u_gpo_1_s1_agent:m0_writedata -> u_gpo_1_s1_translator:uav_writedata
	wire          u_gpo_1_s1_agent_m0_write;                                                     // u_gpo_1_s1_agent:m0_write -> u_gpo_1_s1_translator:uav_write
	wire    [2:0] u_gpo_1_s1_agent_m0_burstcount;                                                // u_gpo_1_s1_agent:m0_burstcount -> u_gpo_1_s1_translator:uav_burstcount
	wire          u_gpo_1_s1_agent_rf_source_valid;                                              // u_gpo_1_s1_agent:rf_source_valid -> u_gpo_1_s1_agent_rsp_fifo:in_valid
	wire  [117:0] u_gpo_1_s1_agent_rf_source_data;                                               // u_gpo_1_s1_agent:rf_source_data -> u_gpo_1_s1_agent_rsp_fifo:in_data
	wire          u_gpo_1_s1_agent_rf_source_ready;                                              // u_gpo_1_s1_agent_rsp_fifo:in_ready -> u_gpo_1_s1_agent:rf_source_ready
	wire          u_gpo_1_s1_agent_rf_source_startofpacket;                                      // u_gpo_1_s1_agent:rf_source_startofpacket -> u_gpo_1_s1_agent_rsp_fifo:in_startofpacket
	wire          u_gpo_1_s1_agent_rf_source_endofpacket;                                        // u_gpo_1_s1_agent:rf_source_endofpacket -> u_gpo_1_s1_agent_rsp_fifo:in_endofpacket
	wire          u_gpo_1_s1_agent_rsp_fifo_out_valid;                                           // u_gpo_1_s1_agent_rsp_fifo:out_valid -> u_gpo_1_s1_agent:rf_sink_valid
	wire  [117:0] u_gpo_1_s1_agent_rsp_fifo_out_data;                                            // u_gpo_1_s1_agent_rsp_fifo:out_data -> u_gpo_1_s1_agent:rf_sink_data
	wire          u_gpo_1_s1_agent_rsp_fifo_out_ready;                                           // u_gpo_1_s1_agent:rf_sink_ready -> u_gpo_1_s1_agent_rsp_fifo:out_ready
	wire          u_gpo_1_s1_agent_rsp_fifo_out_startofpacket;                                   // u_gpo_1_s1_agent_rsp_fifo:out_startofpacket -> u_gpo_1_s1_agent:rf_sink_startofpacket
	wire          u_gpo_1_s1_agent_rsp_fifo_out_endofpacket;                                     // u_gpo_1_s1_agent_rsp_fifo:out_endofpacket -> u_gpo_1_s1_agent:rf_sink_endofpacket
	wire          cmd_mux_023_src_valid;                                                         // cmd_mux_023:src_valid -> u_gpo_1_s1_agent:cp_valid
	wire  [116:0] cmd_mux_023_src_data;                                                          // cmd_mux_023:src_data -> u_gpo_1_s1_agent:cp_data
	wire          cmd_mux_023_src_ready;                                                         // u_gpo_1_s1_agent:cp_ready -> cmd_mux_023:src_ready
	wire   [25:0] cmd_mux_023_src_channel;                                                       // cmd_mux_023:src_channel -> u_gpo_1_s1_agent:cp_channel
	wire          cmd_mux_023_src_startofpacket;                                                 // cmd_mux_023:src_startofpacket -> u_gpo_1_s1_agent:cp_startofpacket
	wire          cmd_mux_023_src_endofpacket;                                                   // cmd_mux_023:src_endofpacket -> u_gpo_1_s1_agent:cp_endofpacket
	wire   [31:0] u_gpi_1_s1_agent_m0_readdata;                                                  // u_gpi_1_s1_translator:uav_readdata -> u_gpi_1_s1_agent:m0_readdata
	wire          u_gpi_1_s1_agent_m0_waitrequest;                                               // u_gpi_1_s1_translator:uav_waitrequest -> u_gpi_1_s1_agent:m0_waitrequest
	wire          u_gpi_1_s1_agent_m0_debugaccess;                                               // u_gpi_1_s1_agent:m0_debugaccess -> u_gpi_1_s1_translator:uav_debugaccess
	wire   [31:0] u_gpi_1_s1_agent_m0_address;                                                   // u_gpi_1_s1_agent:m0_address -> u_gpi_1_s1_translator:uav_address
	wire    [3:0] u_gpi_1_s1_agent_m0_byteenable;                                                // u_gpi_1_s1_agent:m0_byteenable -> u_gpi_1_s1_translator:uav_byteenable
	wire          u_gpi_1_s1_agent_m0_read;                                                      // u_gpi_1_s1_agent:m0_read -> u_gpi_1_s1_translator:uav_read
	wire          u_gpi_1_s1_agent_m0_readdatavalid;                                             // u_gpi_1_s1_translator:uav_readdatavalid -> u_gpi_1_s1_agent:m0_readdatavalid
	wire          u_gpi_1_s1_agent_m0_lock;                                                      // u_gpi_1_s1_agent:m0_lock -> u_gpi_1_s1_translator:uav_lock
	wire   [31:0] u_gpi_1_s1_agent_m0_writedata;                                                 // u_gpi_1_s1_agent:m0_writedata -> u_gpi_1_s1_translator:uav_writedata
	wire          u_gpi_1_s1_agent_m0_write;                                                     // u_gpi_1_s1_agent:m0_write -> u_gpi_1_s1_translator:uav_write
	wire    [2:0] u_gpi_1_s1_agent_m0_burstcount;                                                // u_gpi_1_s1_agent:m0_burstcount -> u_gpi_1_s1_translator:uav_burstcount
	wire          u_gpi_1_s1_agent_rf_source_valid;                                              // u_gpi_1_s1_agent:rf_source_valid -> u_gpi_1_s1_agent_rsp_fifo:in_valid
	wire  [117:0] u_gpi_1_s1_agent_rf_source_data;                                               // u_gpi_1_s1_agent:rf_source_data -> u_gpi_1_s1_agent_rsp_fifo:in_data
	wire          u_gpi_1_s1_agent_rf_source_ready;                                              // u_gpi_1_s1_agent_rsp_fifo:in_ready -> u_gpi_1_s1_agent:rf_source_ready
	wire          u_gpi_1_s1_agent_rf_source_startofpacket;                                      // u_gpi_1_s1_agent:rf_source_startofpacket -> u_gpi_1_s1_agent_rsp_fifo:in_startofpacket
	wire          u_gpi_1_s1_agent_rf_source_endofpacket;                                        // u_gpi_1_s1_agent:rf_source_endofpacket -> u_gpi_1_s1_agent_rsp_fifo:in_endofpacket
	wire          u_gpi_1_s1_agent_rsp_fifo_out_valid;                                           // u_gpi_1_s1_agent_rsp_fifo:out_valid -> u_gpi_1_s1_agent:rf_sink_valid
	wire  [117:0] u_gpi_1_s1_agent_rsp_fifo_out_data;                                            // u_gpi_1_s1_agent_rsp_fifo:out_data -> u_gpi_1_s1_agent:rf_sink_data
	wire          u_gpi_1_s1_agent_rsp_fifo_out_ready;                                           // u_gpi_1_s1_agent:rf_sink_ready -> u_gpi_1_s1_agent_rsp_fifo:out_ready
	wire          u_gpi_1_s1_agent_rsp_fifo_out_startofpacket;                                   // u_gpi_1_s1_agent_rsp_fifo:out_startofpacket -> u_gpi_1_s1_agent:rf_sink_startofpacket
	wire          u_gpi_1_s1_agent_rsp_fifo_out_endofpacket;                                     // u_gpi_1_s1_agent_rsp_fifo:out_endofpacket -> u_gpi_1_s1_agent:rf_sink_endofpacket
	wire          cmd_mux_024_src_valid;                                                         // cmd_mux_024:src_valid -> u_gpi_1_s1_agent:cp_valid
	wire  [116:0] cmd_mux_024_src_data;                                                          // cmd_mux_024:src_data -> u_gpi_1_s1_agent:cp_data
	wire          cmd_mux_024_src_ready;                                                         // u_gpi_1_s1_agent:cp_ready -> cmd_mux_024:src_ready
	wire   [25:0] cmd_mux_024_src_channel;                                                       // cmd_mux_024:src_channel -> u_gpi_1_s1_agent:cp_channel
	wire          cmd_mux_024_src_startofpacket;                                                 // cmd_mux_024:src_startofpacket -> u_gpi_1_s1_agent:cp_startofpacket
	wire          cmd_mux_024_src_endofpacket;                                                   // cmd_mux_024:src_endofpacket -> u_gpi_1_s1_agent:cp_endofpacket
	wire   [31:0] u_gpo_2_s1_agent_m0_readdata;                                                  // u_gpo_2_s1_translator:uav_readdata -> u_gpo_2_s1_agent:m0_readdata
	wire          u_gpo_2_s1_agent_m0_waitrequest;                                               // u_gpo_2_s1_translator:uav_waitrequest -> u_gpo_2_s1_agent:m0_waitrequest
	wire          u_gpo_2_s1_agent_m0_debugaccess;                                               // u_gpo_2_s1_agent:m0_debugaccess -> u_gpo_2_s1_translator:uav_debugaccess
	wire   [31:0] u_gpo_2_s1_agent_m0_address;                                                   // u_gpo_2_s1_agent:m0_address -> u_gpo_2_s1_translator:uav_address
	wire    [3:0] u_gpo_2_s1_agent_m0_byteenable;                                                // u_gpo_2_s1_agent:m0_byteenable -> u_gpo_2_s1_translator:uav_byteenable
	wire          u_gpo_2_s1_agent_m0_read;                                                      // u_gpo_2_s1_agent:m0_read -> u_gpo_2_s1_translator:uav_read
	wire          u_gpo_2_s1_agent_m0_readdatavalid;                                             // u_gpo_2_s1_translator:uav_readdatavalid -> u_gpo_2_s1_agent:m0_readdatavalid
	wire          u_gpo_2_s1_agent_m0_lock;                                                      // u_gpo_2_s1_agent:m0_lock -> u_gpo_2_s1_translator:uav_lock
	wire   [31:0] u_gpo_2_s1_agent_m0_writedata;                                                 // u_gpo_2_s1_agent:m0_writedata -> u_gpo_2_s1_translator:uav_writedata
	wire          u_gpo_2_s1_agent_m0_write;                                                     // u_gpo_2_s1_agent:m0_write -> u_gpo_2_s1_translator:uav_write
	wire    [2:0] u_gpo_2_s1_agent_m0_burstcount;                                                // u_gpo_2_s1_agent:m0_burstcount -> u_gpo_2_s1_translator:uav_burstcount
	wire          u_gpo_2_s1_agent_rf_source_valid;                                              // u_gpo_2_s1_agent:rf_source_valid -> u_gpo_2_s1_agent_rsp_fifo:in_valid
	wire  [117:0] u_gpo_2_s1_agent_rf_source_data;                                               // u_gpo_2_s1_agent:rf_source_data -> u_gpo_2_s1_agent_rsp_fifo:in_data
	wire          u_gpo_2_s1_agent_rf_source_ready;                                              // u_gpo_2_s1_agent_rsp_fifo:in_ready -> u_gpo_2_s1_agent:rf_source_ready
	wire          u_gpo_2_s1_agent_rf_source_startofpacket;                                      // u_gpo_2_s1_agent:rf_source_startofpacket -> u_gpo_2_s1_agent_rsp_fifo:in_startofpacket
	wire          u_gpo_2_s1_agent_rf_source_endofpacket;                                        // u_gpo_2_s1_agent:rf_source_endofpacket -> u_gpo_2_s1_agent_rsp_fifo:in_endofpacket
	wire          u_gpo_2_s1_agent_rsp_fifo_out_valid;                                           // u_gpo_2_s1_agent_rsp_fifo:out_valid -> u_gpo_2_s1_agent:rf_sink_valid
	wire  [117:0] u_gpo_2_s1_agent_rsp_fifo_out_data;                                            // u_gpo_2_s1_agent_rsp_fifo:out_data -> u_gpo_2_s1_agent:rf_sink_data
	wire          u_gpo_2_s1_agent_rsp_fifo_out_ready;                                           // u_gpo_2_s1_agent:rf_sink_ready -> u_gpo_2_s1_agent_rsp_fifo:out_ready
	wire          u_gpo_2_s1_agent_rsp_fifo_out_startofpacket;                                   // u_gpo_2_s1_agent_rsp_fifo:out_startofpacket -> u_gpo_2_s1_agent:rf_sink_startofpacket
	wire          u_gpo_2_s1_agent_rsp_fifo_out_endofpacket;                                     // u_gpo_2_s1_agent_rsp_fifo:out_endofpacket -> u_gpo_2_s1_agent:rf_sink_endofpacket
	wire          cmd_mux_025_src_valid;                                                         // cmd_mux_025:src_valid -> u_gpo_2_s1_agent:cp_valid
	wire  [116:0] cmd_mux_025_src_data;                                                          // cmd_mux_025:src_data -> u_gpo_2_s1_agent:cp_data
	wire          cmd_mux_025_src_ready;                                                         // u_gpo_2_s1_agent:cp_ready -> cmd_mux_025:src_ready
	wire   [25:0] cmd_mux_025_src_channel;                                                       // cmd_mux_025:src_channel -> u_gpo_2_s1_agent:cp_channel
	wire          cmd_mux_025_src_startofpacket;                                                 // cmd_mux_025:src_startofpacket -> u_gpo_2_s1_agent:cp_startofpacket
	wire          cmd_mux_025_src_endofpacket;                                                   // cmd_mux_025:src_endofpacket -> u_gpo_2_s1_agent:cp_endofpacket
	wire          dma_ufm_avmm_bridge_0_avmm_agent_cp_valid;                                     // dma_ufm_avmm_bridge_0_avmm_agent:cp_valid -> router:sink_valid
	wire  [116:0] dma_ufm_avmm_bridge_0_avmm_agent_cp_data;                                      // dma_ufm_avmm_bridge_0_avmm_agent:cp_data -> router:sink_data
	wire          dma_ufm_avmm_bridge_0_avmm_agent_cp_ready;                                     // router:sink_ready -> dma_ufm_avmm_bridge_0_avmm_agent:cp_ready
	wire          dma_ufm_avmm_bridge_0_avmm_agent_cp_startofpacket;                             // dma_ufm_avmm_bridge_0_avmm_agent:cp_startofpacket -> router:sink_startofpacket
	wire          dma_ufm_avmm_bridge_0_avmm_agent_cp_endofpacket;                               // dma_ufm_avmm_bridge_0_avmm_agent:cp_endofpacket -> router:sink_endofpacket
	wire          router_src_valid;                                                              // router:src_valid -> cmd_demux:sink_valid
	wire  [116:0] router_src_data;                                                               // router:src_data -> cmd_demux:sink_data
	wire          router_src_ready;                                                              // cmd_demux:sink_ready -> router:src_ready
	wire   [25:0] router_src_channel;                                                            // router:src_channel -> cmd_demux:sink_channel
	wire          router_src_startofpacket;                                                      // router:src_startofpacket -> cmd_demux:sink_startofpacket
	wire          router_src_endofpacket;                                                        // router:src_endofpacket -> cmd_demux:sink_endofpacket
	wire          u_nios_data_master_agent_cp_valid;                                             // u_nios_data_master_agent:cp_valid -> router_001:sink_valid
	wire  [116:0] u_nios_data_master_agent_cp_data;                                              // u_nios_data_master_agent:cp_data -> router_001:sink_data
	wire          u_nios_data_master_agent_cp_ready;                                             // router_001:sink_ready -> u_nios_data_master_agent:cp_ready
	wire          u_nios_data_master_agent_cp_startofpacket;                                     // u_nios_data_master_agent:cp_startofpacket -> router_001:sink_startofpacket
	wire          u_nios_data_master_agent_cp_endofpacket;                                       // u_nios_data_master_agent:cp_endofpacket -> router_001:sink_endofpacket
	wire          router_001_src_valid;                                                          // router_001:src_valid -> cmd_demux_001:sink_valid
	wire  [116:0] router_001_src_data;                                                           // router_001:src_data -> cmd_demux_001:sink_data
	wire          router_001_src_ready;                                                          // cmd_demux_001:sink_ready -> router_001:src_ready
	wire   [25:0] router_001_src_channel;                                                        // router_001:src_channel -> cmd_demux_001:sink_channel
	wire          router_001_src_startofpacket;                                                  // router_001:src_startofpacket -> cmd_demux_001:sink_startofpacket
	wire          router_001_src_endofpacket;                                                    // router_001:src_endofpacket -> cmd_demux_001:sink_endofpacket
	wire          u_nios_instruction_master_agent_cp_valid;                                      // u_nios_instruction_master_agent:cp_valid -> router_002:sink_valid
	wire  [116:0] u_nios_instruction_master_agent_cp_data;                                       // u_nios_instruction_master_agent:cp_data -> router_002:sink_data
	wire          u_nios_instruction_master_agent_cp_ready;                                      // router_002:sink_ready -> u_nios_instruction_master_agent:cp_ready
	wire          u_nios_instruction_master_agent_cp_startofpacket;                              // u_nios_instruction_master_agent:cp_startofpacket -> router_002:sink_startofpacket
	wire          u_nios_instruction_master_agent_cp_endofpacket;                                // u_nios_instruction_master_agent:cp_endofpacket -> router_002:sink_endofpacket
	wire          router_002_src_valid;                                                          // router_002:src_valid -> cmd_demux_002:sink_valid
	wire  [116:0] router_002_src_data;                                                           // router_002:src_data -> cmd_demux_002:sink_data
	wire          router_002_src_ready;                                                          // cmd_demux_002:sink_ready -> router_002:src_ready
	wire   [25:0] router_002_src_channel;                                                        // router_002:src_channel -> cmd_demux_002:sink_channel
	wire          router_002_src_startofpacket;                                                  // router_002:src_startofpacket -> cmd_demux_002:sink_startofpacket
	wire          router_002_src_endofpacket;                                                    // router_002:src_endofpacket -> cmd_demux_002:sink_endofpacket
	wire          u_ufm_data_agent_rp_valid;                                                     // u_ufm_data_agent:rp_valid -> router_003:sink_valid
	wire  [116:0] u_ufm_data_agent_rp_data;                                                      // u_ufm_data_agent:rp_data -> router_003:sink_data
	wire          u_ufm_data_agent_rp_ready;                                                     // router_003:sink_ready -> u_ufm_data_agent:rp_ready
	wire          u_ufm_data_agent_rp_startofpacket;                                             // u_ufm_data_agent:rp_startofpacket -> router_003:sink_startofpacket
	wire          u_ufm_data_agent_rp_endofpacket;                                               // u_ufm_data_agent:rp_endofpacket -> router_003:sink_endofpacket
	wire          router_003_src_valid;                                                          // router_003:src_valid -> rsp_demux:sink_valid
	wire  [116:0] router_003_src_data;                                                           // router_003:src_data -> rsp_demux:sink_data
	wire          router_003_src_ready;                                                          // rsp_demux:sink_ready -> router_003:src_ready
	wire   [25:0] router_003_src_channel;                                                        // router_003:src_channel -> rsp_demux:sink_channel
	wire          router_003_src_startofpacket;                                                  // router_003:src_startofpacket -> rsp_demux:sink_startofpacket
	wire          router_003_src_endofpacket;                                                    // router_003:src_endofpacket -> rsp_demux:sink_endofpacket
	wire          u_nios_debug_mem_slave_agent_rp_valid;                                         // u_nios_debug_mem_slave_agent:rp_valid -> router_004:sink_valid
	wire  [116:0] u_nios_debug_mem_slave_agent_rp_data;                                          // u_nios_debug_mem_slave_agent:rp_data -> router_004:sink_data
	wire          u_nios_debug_mem_slave_agent_rp_ready;                                         // router_004:sink_ready -> u_nios_debug_mem_slave_agent:rp_ready
	wire          u_nios_debug_mem_slave_agent_rp_startofpacket;                                 // u_nios_debug_mem_slave_agent:rp_startofpacket -> router_004:sink_startofpacket
	wire          u_nios_debug_mem_slave_agent_rp_endofpacket;                                   // u_nios_debug_mem_slave_agent:rp_endofpacket -> router_004:sink_endofpacket
	wire          router_004_src_valid;                                                          // router_004:src_valid -> rsp_demux_001:sink_valid
	wire  [116:0] router_004_src_data;                                                           // router_004:src_data -> rsp_demux_001:sink_data
	wire          router_004_src_ready;                                                          // rsp_demux_001:sink_ready -> router_004:src_ready
	wire   [25:0] router_004_src_channel;                                                        // router_004:src_channel -> rsp_demux_001:sink_channel
	wire          router_004_src_startofpacket;                                                  // router_004:src_startofpacket -> rsp_demux_001:sink_startofpacket
	wire          router_004_src_endofpacket;                                                    // router_004:src_endofpacket -> rsp_demux_001:sink_endofpacket
	wire          u_nios_ram_s1_agent_rp_valid;                                                  // u_nios_ram_s1_agent:rp_valid -> router_005:sink_valid
	wire  [116:0] u_nios_ram_s1_agent_rp_data;                                                   // u_nios_ram_s1_agent:rp_data -> router_005:sink_data
	wire          u_nios_ram_s1_agent_rp_ready;                                                  // router_005:sink_ready -> u_nios_ram_s1_agent:rp_ready
	wire          u_nios_ram_s1_agent_rp_startofpacket;                                          // u_nios_ram_s1_agent:rp_startofpacket -> router_005:sink_startofpacket
	wire          u_nios_ram_s1_agent_rp_endofpacket;                                            // u_nios_ram_s1_agent:rp_endofpacket -> router_005:sink_endofpacket
	wire          router_005_src_valid;                                                          // router_005:src_valid -> rsp_demux_002:sink_valid
	wire  [116:0] router_005_src_data;                                                           // router_005:src_data -> rsp_demux_002:sink_data
	wire          router_005_src_ready;                                                          // rsp_demux_002:sink_ready -> router_005:src_ready
	wire   [25:0] router_005_src_channel;                                                        // router_005:src_channel -> rsp_demux_002:sink_channel
	wire          router_005_src_startofpacket;                                                  // router_005:src_startofpacket -> rsp_demux_002:sink_startofpacket
	wire          router_005_src_endofpacket;                                                    // router_005:src_endofpacket -> rsp_demux_002:sink_endofpacket
	wire          u_dual_config_avalon_agent_rp_valid;                                           // u_dual_config_avalon_agent:rp_valid -> router_006:sink_valid
	wire  [116:0] u_dual_config_avalon_agent_rp_data;                                            // u_dual_config_avalon_agent:rp_data -> router_006:sink_data
	wire          u_dual_config_avalon_agent_rp_ready;                                           // router_006:sink_ready -> u_dual_config_avalon_agent:rp_ready
	wire          u_dual_config_avalon_agent_rp_startofpacket;                                   // u_dual_config_avalon_agent:rp_startofpacket -> router_006:sink_startofpacket
	wire          u_dual_config_avalon_agent_rp_endofpacket;                                     // u_dual_config_avalon_agent:rp_endofpacket -> router_006:sink_endofpacket
	wire          router_006_src_valid;                                                          // router_006:src_valid -> rsp_demux_003:sink_valid
	wire  [116:0] router_006_src_data;                                                           // router_006:src_data -> rsp_demux_003:sink_data
	wire          router_006_src_ready;                                                          // rsp_demux_003:sink_ready -> router_006:src_ready
	wire   [25:0] router_006_src_channel;                                                        // router_006:src_channel -> rsp_demux_003:sink_channel
	wire          router_006_src_startofpacket;                                                  // router_006:src_startofpacket -> rsp_demux_003:sink_startofpacket
	wire          router_006_src_endofpacket;                                                    // router_006:src_endofpacket -> rsp_demux_003:sink_endofpacket
	wire          u_relay1_avmm_bridge_avmm_agent_rp_valid;                                      // u_relay1_avmm_bridge_avmm_agent:rp_valid -> router_007:sink_valid
	wire  [116:0] u_relay1_avmm_bridge_avmm_agent_rp_data;                                       // u_relay1_avmm_bridge_avmm_agent:rp_data -> router_007:sink_data
	wire          u_relay1_avmm_bridge_avmm_agent_rp_ready;                                      // router_007:sink_ready -> u_relay1_avmm_bridge_avmm_agent:rp_ready
	wire          u_relay1_avmm_bridge_avmm_agent_rp_startofpacket;                              // u_relay1_avmm_bridge_avmm_agent:rp_startofpacket -> router_007:sink_startofpacket
	wire          u_relay1_avmm_bridge_avmm_agent_rp_endofpacket;                                // u_relay1_avmm_bridge_avmm_agent:rp_endofpacket -> router_007:sink_endofpacket
	wire          router_007_src_valid;                                                          // router_007:src_valid -> rsp_demux_004:sink_valid
	wire  [116:0] router_007_src_data;                                                           // router_007:src_data -> rsp_demux_004:sink_data
	wire          router_007_src_ready;                                                          // rsp_demux_004:sink_ready -> router_007:src_ready
	wire   [25:0] router_007_src_channel;                                                        // router_007:src_channel -> rsp_demux_004:sink_channel
	wire          router_007_src_startofpacket;                                                  // router_007:src_startofpacket -> rsp_demux_004:sink_startofpacket
	wire          router_007_src_endofpacket;                                                    // router_007:src_endofpacket -> rsp_demux_004:sink_endofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_valid;                            // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rp_valid -> router_008:sink_valid
	wire  [116:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_data;                             // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rp_data -> router_008:sink_data
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_ready;                            // router_008:sink_ready -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rp_ready
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_startofpacket;                    // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rp_startofpacket -> router_008:sink_startofpacket
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_endofpacket;                      // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rp_endofpacket -> router_008:sink_endofpacket
	wire          router_008_src_valid;                                                          // router_008:src_valid -> rsp_demux_005:sink_valid
	wire  [116:0] router_008_src_data;                                                           // router_008:src_data -> rsp_demux_005:sink_data
	wire          router_008_src_ready;                                                          // rsp_demux_005:sink_ready -> router_008:src_ready
	wire   [25:0] router_008_src_channel;                                                        // router_008:src_channel -> rsp_demux_005:sink_channel
	wire          router_008_src_startofpacket;                                                  // router_008:src_startofpacket -> rsp_demux_005:sink_startofpacket
	wire          router_008_src_endofpacket;                                                    // router_008:src_endofpacket -> rsp_demux_005:sink_endofpacket
	wire          u_relay3_avmm_bridge_avmm_agent_rp_valid;                                      // u_relay3_avmm_bridge_avmm_agent:rp_valid -> router_009:sink_valid
	wire  [116:0] u_relay3_avmm_bridge_avmm_agent_rp_data;                                       // u_relay3_avmm_bridge_avmm_agent:rp_data -> router_009:sink_data
	wire          u_relay3_avmm_bridge_avmm_agent_rp_ready;                                      // router_009:sink_ready -> u_relay3_avmm_bridge_avmm_agent:rp_ready
	wire          u_relay3_avmm_bridge_avmm_agent_rp_startofpacket;                              // u_relay3_avmm_bridge_avmm_agent:rp_startofpacket -> router_009:sink_startofpacket
	wire          u_relay3_avmm_bridge_avmm_agent_rp_endofpacket;                                // u_relay3_avmm_bridge_avmm_agent:rp_endofpacket -> router_009:sink_endofpacket
	wire          router_009_src_valid;                                                          // router_009:src_valid -> rsp_demux_006:sink_valid
	wire  [116:0] router_009_src_data;                                                           // router_009:src_data -> rsp_demux_006:sink_data
	wire          router_009_src_ready;                                                          // rsp_demux_006:sink_ready -> router_009:src_ready
	wire   [25:0] router_009_src_channel;                                                        // router_009:src_channel -> rsp_demux_006:sink_channel
	wire          router_009_src_startofpacket;                                                  // router_009:src_startofpacket -> rsp_demux_006:sink_startofpacket
	wire          router_009_src_endofpacket;                                                    // router_009:src_endofpacket -> rsp_demux_006:sink_endofpacket
	wire          u_mailbox_avmm_bridge_avmm_agent_rp_valid;                                     // u_mailbox_avmm_bridge_avmm_agent:rp_valid -> router_010:sink_valid
	wire  [116:0] u_mailbox_avmm_bridge_avmm_agent_rp_data;                                      // u_mailbox_avmm_bridge_avmm_agent:rp_data -> router_010:sink_data
	wire          u_mailbox_avmm_bridge_avmm_agent_rp_ready;                                     // router_010:sink_ready -> u_mailbox_avmm_bridge_avmm_agent:rp_ready
	wire          u_mailbox_avmm_bridge_avmm_agent_rp_startofpacket;                             // u_mailbox_avmm_bridge_avmm_agent:rp_startofpacket -> router_010:sink_startofpacket
	wire          u_mailbox_avmm_bridge_avmm_agent_rp_endofpacket;                               // u_mailbox_avmm_bridge_avmm_agent:rp_endofpacket -> router_010:sink_endofpacket
	wire          router_010_src_valid;                                                          // router_010:src_valid -> rsp_demux_007:sink_valid
	wire  [116:0] router_010_src_data;                                                           // router_010:src_data -> rsp_demux_007:sink_data
	wire          router_010_src_ready;                                                          // rsp_demux_007:sink_ready -> router_010:src_ready
	wire   [25:0] router_010_src_channel;                                                        // router_010:src_channel -> rsp_demux_007:sink_channel
	wire          router_010_src_startofpacket;                                                  // router_010:src_startofpacket -> rsp_demux_007:sink_startofpacket
	wire          router_010_src_endofpacket;                                                    // router_010:src_endofpacket -> rsp_demux_007:sink_endofpacket
	wire          u_rfnvram_smbus_master_avmm_agent_rp_valid;                                    // u_rfnvram_smbus_master_avmm_agent:rp_valid -> router_011:sink_valid
	wire  [116:0] u_rfnvram_smbus_master_avmm_agent_rp_data;                                     // u_rfnvram_smbus_master_avmm_agent:rp_data -> router_011:sink_data
	wire          u_rfnvram_smbus_master_avmm_agent_rp_ready;                                    // router_011:sink_ready -> u_rfnvram_smbus_master_avmm_agent:rp_ready
	wire          u_rfnvram_smbus_master_avmm_agent_rp_startofpacket;                            // u_rfnvram_smbus_master_avmm_agent:rp_startofpacket -> router_011:sink_startofpacket
	wire          u_rfnvram_smbus_master_avmm_agent_rp_endofpacket;                              // u_rfnvram_smbus_master_avmm_agent:rp_endofpacket -> router_011:sink_endofpacket
	wire          router_011_src_valid;                                                          // router_011:src_valid -> rsp_demux_008:sink_valid
	wire  [116:0] router_011_src_data;                                                           // router_011:src_data -> rsp_demux_008:sink_data
	wire          router_011_src_ready;                                                          // rsp_demux_008:sink_ready -> router_011:src_ready
	wire   [25:0] router_011_src_channel;                                                        // router_011:src_channel -> rsp_demux_008:sink_channel
	wire          router_011_src_startofpacket;                                                  // router_011:src_startofpacket -> rsp_demux_008:sink_startofpacket
	wire          router_011_src_endofpacket;                                                    // router_011:src_endofpacket -> rsp_demux_008:sink_endofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rp_valid;                                  // u_spi_filter_avmm_bridge_avmm_agent:rp_valid -> router_012:sink_valid
	wire  [116:0] u_spi_filter_avmm_bridge_avmm_agent_rp_data;                                   // u_spi_filter_avmm_bridge_avmm_agent:rp_data -> router_012:sink_data
	wire          u_spi_filter_avmm_bridge_avmm_agent_rp_ready;                                  // router_012:sink_ready -> u_spi_filter_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_avmm_bridge_avmm_agent_rp_startofpacket;                          // u_spi_filter_avmm_bridge_avmm_agent:rp_startofpacket -> router_012:sink_startofpacket
	wire          u_spi_filter_avmm_bridge_avmm_agent_rp_endofpacket;                            // u_spi_filter_avmm_bridge_avmm_agent:rp_endofpacket -> router_012:sink_endofpacket
	wire          router_012_src_valid;                                                          // router_012:src_valid -> rsp_demux_009:sink_valid
	wire  [116:0] router_012_src_data;                                                           // router_012:src_data -> rsp_demux_009:sink_data
	wire          router_012_src_ready;                                                          // rsp_demux_009:sink_ready -> router_012:src_ready
	wire   [25:0] router_012_src_channel;                                                        // router_012:src_channel -> rsp_demux_009:sink_channel
	wire          router_012_src_startofpacket;                                                  // router_012:src_startofpacket -> rsp_demux_009:sink_startofpacket
	wire          router_012_src_endofpacket;                                                    // router_012:src_endofpacket -> rsp_demux_009:sink_endofpacket
	wire          u_timer_bank_avmm_bridge_avmm_agent_rp_valid;                                  // u_timer_bank_avmm_bridge_avmm_agent:rp_valid -> router_013:sink_valid
	wire  [116:0] u_timer_bank_avmm_bridge_avmm_agent_rp_data;                                   // u_timer_bank_avmm_bridge_avmm_agent:rp_data -> router_013:sink_data
	wire          u_timer_bank_avmm_bridge_avmm_agent_rp_ready;                                  // router_013:sink_ready -> u_timer_bank_avmm_bridge_avmm_agent:rp_ready
	wire          u_timer_bank_avmm_bridge_avmm_agent_rp_startofpacket;                          // u_timer_bank_avmm_bridge_avmm_agent:rp_startofpacket -> router_013:sink_startofpacket
	wire          u_timer_bank_avmm_bridge_avmm_agent_rp_endofpacket;                            // u_timer_bank_avmm_bridge_avmm_agent:rp_endofpacket -> router_013:sink_endofpacket
	wire          router_013_src_valid;                                                          // router_013:src_valid -> rsp_demux_010:sink_valid
	wire  [116:0] router_013_src_data;                                                           // router_013:src_data -> rsp_demux_010:sink_data
	wire          router_013_src_ready;                                                          // rsp_demux_010:sink_ready -> router_013:src_ready
	wire   [25:0] router_013_src_channel;                                                        // router_013:src_channel -> rsp_demux_010:sink_channel
	wire          router_013_src_startofpacket;                                                  // router_013:src_startofpacket -> rsp_demux_010:sink_startofpacket
	wire          router_013_src_endofpacket;                                                    // router_013:src_endofpacket -> rsp_demux_010:sink_endofpacket
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rp_valid;                                  // u_crypto_dma_avmm_bridge_avmm_agent:rp_valid -> router_014:sink_valid
	wire  [116:0] u_crypto_dma_avmm_bridge_avmm_agent_rp_data;                                   // u_crypto_dma_avmm_bridge_avmm_agent:rp_data -> router_014:sink_data
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rp_ready;                                  // router_014:sink_ready -> u_crypto_dma_avmm_bridge_avmm_agent:rp_ready
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rp_startofpacket;                          // u_crypto_dma_avmm_bridge_avmm_agent:rp_startofpacket -> router_014:sink_startofpacket
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rp_endofpacket;                            // u_crypto_dma_avmm_bridge_avmm_agent:rp_endofpacket -> router_014:sink_endofpacket
	wire          router_014_src_valid;                                                          // router_014:src_valid -> rsp_demux_011:sink_valid
	wire  [116:0] router_014_src_data;                                                           // router_014:src_data -> rsp_demux_011:sink_data
	wire          router_014_src_ready;                                                          // rsp_demux_011:sink_ready -> router_014:src_ready
	wire   [25:0] router_014_src_channel;                                                        // router_014:src_channel -> rsp_demux_011:sink_channel
	wire          router_014_src_startofpacket;                                                  // router_014:src_startofpacket -> rsp_demux_011:sink_startofpacket
	wire          router_014_src_endofpacket;                                                    // router_014:src_endofpacket -> rsp_demux_011:sink_endofpacket
	wire          u_crypto_avmm_bridge_avmm_agent_rp_valid;                                      // u_crypto_avmm_bridge_avmm_agent:rp_valid -> router_015:sink_valid
	wire  [116:0] u_crypto_avmm_bridge_avmm_agent_rp_data;                                       // u_crypto_avmm_bridge_avmm_agent:rp_data -> router_015:sink_data
	wire          u_crypto_avmm_bridge_avmm_agent_rp_ready;                                      // router_015:sink_ready -> u_crypto_avmm_bridge_avmm_agent:rp_ready
	wire          u_crypto_avmm_bridge_avmm_agent_rp_startofpacket;                              // u_crypto_avmm_bridge_avmm_agent:rp_startofpacket -> router_015:sink_startofpacket
	wire          u_crypto_avmm_bridge_avmm_agent_rp_endofpacket;                                // u_crypto_avmm_bridge_avmm_agent:rp_endofpacket -> router_015:sink_endofpacket
	wire          router_015_src_valid;                                                          // router_015:src_valid -> rsp_demux_012:sink_valid
	wire  [116:0] router_015_src_data;                                                           // router_015:src_data -> rsp_demux_012:sink_data
	wire          router_015_src_ready;                                                          // rsp_demux_012:sink_ready -> router_015:src_ready
	wire   [25:0] router_015_src_channel;                                                        // router_015:src_channel -> rsp_demux_012:sink_channel
	wire          router_015_src_startofpacket;                                                  // router_015:src_startofpacket -> rsp_demux_012:sink_startofpacket
	wire          router_015_src_endofpacket;                                                    // router_015:src_endofpacket -> rsp_demux_012:sink_endofpacket
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_valid;                           // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rp_valid -> router_016:sink_valid
	wire  [116:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_data;                            // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rp_data -> router_016:sink_data
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_ready;                           // router_016:sink_ready -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_startofpacket;                   // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rp_startofpacket -> router_016:sink_startofpacket
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_endofpacket;                     // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rp_endofpacket -> router_016:sink_endofpacket
	wire          router_016_src_valid;                                                          // router_016:src_valid -> rsp_demux_013:sink_valid
	wire  [116:0] router_016_src_data;                                                           // router_016:src_data -> rsp_demux_013:sink_data
	wire          router_016_src_ready;                                                          // rsp_demux_013:sink_ready -> router_016:src_ready
	wire   [25:0] router_016_src_channel;                                                        // router_016:src_channel -> rsp_demux_013:sink_channel
	wire          router_016_src_startofpacket;                                                  // router_016:src_startofpacket -> rsp_demux_013:sink_startofpacket
	wire          router_016_src_endofpacket;                                                    // router_016:src_endofpacket -> rsp_demux_013:sink_endofpacket
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_valid;                   // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rp_valid -> router_017:sink_valid
	wire  [116:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_data;                    // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rp_data -> router_017:sink_data
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_ready;                   // router_017:sink_ready -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket;           // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rp_startofpacket -> router_017:sink_startofpacket
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket;             // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rp_endofpacket -> router_017:sink_endofpacket
	wire          router_017_src_valid;                                                          // router_017:src_valid -> rsp_demux_014:sink_valid
	wire  [116:0] router_017_src_data;                                                           // router_017:src_data -> rsp_demux_014:sink_data
	wire          router_017_src_ready;                                                          // rsp_demux_014:sink_ready -> router_017:src_ready
	wire   [25:0] router_017_src_channel;                                                        // router_017:src_channel -> rsp_demux_014:sink_channel
	wire          router_017_src_startofpacket;                                                  // router_017:src_startofpacket -> rsp_demux_014:sink_startofpacket
	wire          router_017_src_endofpacket;                                                    // router_017:src_endofpacket -> rsp_demux_014:sink_endofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rp_valid;                                         // u_i3c_avmm_bridge_avmm_agent:rp_valid -> router_018:sink_valid
	wire  [116:0] u_i3c_avmm_bridge_avmm_agent_rp_data;                                          // u_i3c_avmm_bridge_avmm_agent:rp_data -> router_018:sink_data
	wire          u_i3c_avmm_bridge_avmm_agent_rp_ready;                                         // router_018:sink_ready -> u_i3c_avmm_bridge_avmm_agent:rp_ready
	wire          u_i3c_avmm_bridge_avmm_agent_rp_startofpacket;                                 // u_i3c_avmm_bridge_avmm_agent:rp_startofpacket -> router_018:sink_startofpacket
	wire          u_i3c_avmm_bridge_avmm_agent_rp_endofpacket;                                   // u_i3c_avmm_bridge_avmm_agent:rp_endofpacket -> router_018:sink_endofpacket
	wire          router_018_src_valid;                                                          // router_018:src_valid -> rsp_demux_015:sink_valid
	wire  [116:0] router_018_src_data;                                                           // router_018:src_data -> rsp_demux_015:sink_data
	wire          router_018_src_ready;                                                          // rsp_demux_015:sink_ready -> router_018:src_ready
	wire   [25:0] router_018_src_channel;                                                        // router_018:src_channel -> rsp_demux_015:sink_channel
	wire          router_018_src_startofpacket;                                                  // router_018:src_startofpacket -> rsp_demux_015:sink_startofpacket
	wire          router_018_src_endofpacket;                                                    // router_018:src_endofpacket -> rsp_demux_015:sink_endofpacket
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_valid;                   // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rp_valid -> router_019:sink_valid
	wire  [116:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_data;                    // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rp_data -> router_019:sink_data
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_ready;                   // router_019:sink_ready -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket;           // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rp_startofpacket -> router_019:sink_startofpacket
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket;             // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rp_endofpacket -> router_019:sink_endofpacket
	wire          router_019_src_valid;                                                          // router_019:src_valid -> rsp_demux_016:sink_valid
	wire  [116:0] router_019_src_data;                                                           // router_019:src_data -> rsp_demux_016:sink_data
	wire          router_019_src_ready;                                                          // rsp_demux_016:sink_ready -> router_019:src_ready
	wire   [25:0] router_019_src_channel;                                                        // router_019:src_channel -> rsp_demux_016:sink_channel
	wire          router_019_src_startofpacket;                                                  // router_019:src_startofpacket -> rsp_demux_016:sink_startofpacket
	wire          router_019_src_endofpacket;                                                    // router_019:src_endofpacket -> rsp_demux_016:sink_endofpacket
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_valid;                   // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rp_valid -> router_020:sink_valid
	wire  [116:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_data;                    // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rp_data -> router_020:sink_data
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_ready;                   // router_020:sink_ready -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket;           // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rp_startofpacket -> router_020:sink_startofpacket
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket;             // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rp_endofpacket -> router_020:sink_endofpacket
	wire          router_020_src_valid;                                                          // router_020:src_valid -> rsp_demux_017:sink_valid
	wire  [116:0] router_020_src_data;                                                           // router_020:src_data -> rsp_demux_017:sink_data
	wire          router_020_src_ready;                                                          // rsp_demux_017:sink_ready -> router_020:src_ready
	wire   [25:0] router_020_src_channel;                                                        // router_020:src_channel -> rsp_demux_017:sink_channel
	wire          router_020_src_startofpacket;                                                  // router_020:src_startofpacket -> rsp_demux_017:sink_startofpacket
	wire          router_020_src_endofpacket;                                                    // router_020:src_endofpacket -> rsp_demux_017:sink_endofpacket
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_valid;                   // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rp_valid -> router_021:sink_valid
	wire  [116:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_data;                    // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rp_data -> router_021:sink_data
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_ready;                   // router_021:sink_ready -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rp_ready
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket;           // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rp_startofpacket -> router_021:sink_startofpacket
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket;             // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rp_endofpacket -> router_021:sink_endofpacket
	wire          router_021_src_valid;                                                          // router_021:src_valid -> rsp_demux_018:sink_valid
	wire  [116:0] router_021_src_data;                                                           // router_021:src_data -> rsp_demux_018:sink_data
	wire          router_021_src_ready;                                                          // rsp_demux_018:sink_ready -> router_021:src_ready
	wire   [25:0] router_021_src_channel;                                                        // router_021:src_channel -> rsp_demux_018:sink_channel
	wire          router_021_src_startofpacket;                                                  // router_021:src_startofpacket -> rsp_demux_018:sink_startofpacket
	wire          router_021_src_endofpacket;                                                    // router_021:src_endofpacket -> rsp_demux_018:sink_endofpacket
	wire          u_relay2_avmm_bridge_avmm_agent_rp_valid;                                      // u_relay2_avmm_bridge_avmm_agent:rp_valid -> router_022:sink_valid
	wire  [116:0] u_relay2_avmm_bridge_avmm_agent_rp_data;                                       // u_relay2_avmm_bridge_avmm_agent:rp_data -> router_022:sink_data
	wire          u_relay2_avmm_bridge_avmm_agent_rp_ready;                                      // router_022:sink_ready -> u_relay2_avmm_bridge_avmm_agent:rp_ready
	wire          u_relay2_avmm_bridge_avmm_agent_rp_startofpacket;                              // u_relay2_avmm_bridge_avmm_agent:rp_startofpacket -> router_022:sink_startofpacket
	wire          u_relay2_avmm_bridge_avmm_agent_rp_endofpacket;                                // u_relay2_avmm_bridge_avmm_agent:rp_endofpacket -> router_022:sink_endofpacket
	wire          router_022_src_valid;                                                          // router_022:src_valid -> rsp_demux_019:sink_valid
	wire  [116:0] router_022_src_data;                                                           // router_022:src_data -> rsp_demux_019:sink_data
	wire          router_022_src_ready;                                                          // rsp_demux_019:sink_ready -> router_022:src_ready
	wire   [25:0] router_022_src_channel;                                                        // router_022:src_channel -> rsp_demux_019:sink_channel
	wire          router_022_src_startofpacket;                                                  // router_022:src_startofpacket -> rsp_demux_019:sink_startofpacket
	wire          router_022_src_endofpacket;                                                    // router_022:src_endofpacket -> rsp_demux_019:sink_endofpacket
	wire          u_aes_avmm_bridge_avmm_agent_rp_valid;                                         // u_aes_avmm_bridge_avmm_agent:rp_valid -> router_023:sink_valid
	wire  [116:0] u_aes_avmm_bridge_avmm_agent_rp_data;                                          // u_aes_avmm_bridge_avmm_agent:rp_data -> router_023:sink_data
	wire          u_aes_avmm_bridge_avmm_agent_rp_ready;                                         // router_023:sink_ready -> u_aes_avmm_bridge_avmm_agent:rp_ready
	wire          u_aes_avmm_bridge_avmm_agent_rp_startofpacket;                                 // u_aes_avmm_bridge_avmm_agent:rp_startofpacket -> router_023:sink_startofpacket
	wire          u_aes_avmm_bridge_avmm_agent_rp_endofpacket;                                   // u_aes_avmm_bridge_avmm_agent:rp_endofpacket -> router_023:sink_endofpacket
	wire          router_023_src_valid;                                                          // router_023:src_valid -> rsp_demux_020:sink_valid
	wire  [116:0] router_023_src_data;                                                           // router_023:src_data -> rsp_demux_020:sink_data
	wire          router_023_src_ready;                                                          // rsp_demux_020:sink_ready -> router_023:src_ready
	wire   [25:0] router_023_src_channel;                                                        // router_023:src_channel -> rsp_demux_020:sink_channel
	wire          router_023_src_startofpacket;                                                  // router_023:src_startofpacket -> rsp_demux_020:sink_startofpacket
	wire          router_023_src_endofpacket;                                                    // router_023:src_endofpacket -> rsp_demux_020:sink_endofpacket
	wire          u_ufm_csr_agent_rp_valid;                                                      // u_ufm_csr_agent:rp_valid -> router_024:sink_valid
	wire  [116:0] u_ufm_csr_agent_rp_data;                                                       // u_ufm_csr_agent:rp_data -> router_024:sink_data
	wire          u_ufm_csr_agent_rp_ready;                                                      // router_024:sink_ready -> u_ufm_csr_agent:rp_ready
	wire          u_ufm_csr_agent_rp_startofpacket;                                              // u_ufm_csr_agent:rp_startofpacket -> router_024:sink_startofpacket
	wire          u_ufm_csr_agent_rp_endofpacket;                                                // u_ufm_csr_agent:rp_endofpacket -> router_024:sink_endofpacket
	wire          router_024_src_valid;                                                          // router_024:src_valid -> rsp_demux_021:sink_valid
	wire  [116:0] router_024_src_data;                                                           // router_024:src_data -> rsp_demux_021:sink_data
	wire          router_024_src_ready;                                                          // rsp_demux_021:sink_ready -> router_024:src_ready
	wire   [25:0] router_024_src_channel;                                                        // router_024:src_channel -> rsp_demux_021:sink_channel
	wire          router_024_src_startofpacket;                                                  // router_024:src_startofpacket -> rsp_demux_021:sink_startofpacket
	wire          router_024_src_endofpacket;                                                    // router_024:src_endofpacket -> rsp_demux_021:sink_endofpacket
	wire          u_global_state_reg_s1_agent_rp_valid;                                          // u_global_state_reg_s1_agent:rp_valid -> router_025:sink_valid
	wire  [116:0] u_global_state_reg_s1_agent_rp_data;                                           // u_global_state_reg_s1_agent:rp_data -> router_025:sink_data
	wire          u_global_state_reg_s1_agent_rp_ready;                                          // router_025:sink_ready -> u_global_state_reg_s1_agent:rp_ready
	wire          u_global_state_reg_s1_agent_rp_startofpacket;                                  // u_global_state_reg_s1_agent:rp_startofpacket -> router_025:sink_startofpacket
	wire          u_global_state_reg_s1_agent_rp_endofpacket;                                    // u_global_state_reg_s1_agent:rp_endofpacket -> router_025:sink_endofpacket
	wire          router_025_src_valid;                                                          // router_025:src_valid -> rsp_demux_022:sink_valid
	wire  [116:0] router_025_src_data;                                                           // router_025:src_data -> rsp_demux_022:sink_data
	wire          router_025_src_ready;                                                          // rsp_demux_022:sink_ready -> router_025:src_ready
	wire   [25:0] router_025_src_channel;                                                        // router_025:src_channel -> rsp_demux_022:sink_channel
	wire          router_025_src_startofpacket;                                                  // router_025:src_startofpacket -> rsp_demux_022:sink_startofpacket
	wire          router_025_src_endofpacket;                                                    // router_025:src_endofpacket -> rsp_demux_022:sink_endofpacket
	wire          u_gpo_1_s1_agent_rp_valid;                                                     // u_gpo_1_s1_agent:rp_valid -> router_026:sink_valid
	wire  [116:0] u_gpo_1_s1_agent_rp_data;                                                      // u_gpo_1_s1_agent:rp_data -> router_026:sink_data
	wire          u_gpo_1_s1_agent_rp_ready;                                                     // router_026:sink_ready -> u_gpo_1_s1_agent:rp_ready
	wire          u_gpo_1_s1_agent_rp_startofpacket;                                             // u_gpo_1_s1_agent:rp_startofpacket -> router_026:sink_startofpacket
	wire          u_gpo_1_s1_agent_rp_endofpacket;                                               // u_gpo_1_s1_agent:rp_endofpacket -> router_026:sink_endofpacket
	wire          router_026_src_valid;                                                          // router_026:src_valid -> rsp_demux_023:sink_valid
	wire  [116:0] router_026_src_data;                                                           // router_026:src_data -> rsp_demux_023:sink_data
	wire          router_026_src_ready;                                                          // rsp_demux_023:sink_ready -> router_026:src_ready
	wire   [25:0] router_026_src_channel;                                                        // router_026:src_channel -> rsp_demux_023:sink_channel
	wire          router_026_src_startofpacket;                                                  // router_026:src_startofpacket -> rsp_demux_023:sink_startofpacket
	wire          router_026_src_endofpacket;                                                    // router_026:src_endofpacket -> rsp_demux_023:sink_endofpacket
	wire          u_gpi_1_s1_agent_rp_valid;                                                     // u_gpi_1_s1_agent:rp_valid -> router_027:sink_valid
	wire  [116:0] u_gpi_1_s1_agent_rp_data;                                                      // u_gpi_1_s1_agent:rp_data -> router_027:sink_data
	wire          u_gpi_1_s1_agent_rp_ready;                                                     // router_027:sink_ready -> u_gpi_1_s1_agent:rp_ready
	wire          u_gpi_1_s1_agent_rp_startofpacket;                                             // u_gpi_1_s1_agent:rp_startofpacket -> router_027:sink_startofpacket
	wire          u_gpi_1_s1_agent_rp_endofpacket;                                               // u_gpi_1_s1_agent:rp_endofpacket -> router_027:sink_endofpacket
	wire          router_027_src_valid;                                                          // router_027:src_valid -> rsp_demux_024:sink_valid
	wire  [116:0] router_027_src_data;                                                           // router_027:src_data -> rsp_demux_024:sink_data
	wire          router_027_src_ready;                                                          // rsp_demux_024:sink_ready -> router_027:src_ready
	wire   [25:0] router_027_src_channel;                                                        // router_027:src_channel -> rsp_demux_024:sink_channel
	wire          router_027_src_startofpacket;                                                  // router_027:src_startofpacket -> rsp_demux_024:sink_startofpacket
	wire          router_027_src_endofpacket;                                                    // router_027:src_endofpacket -> rsp_demux_024:sink_endofpacket
	wire          u_gpo_2_s1_agent_rp_valid;                                                     // u_gpo_2_s1_agent:rp_valid -> router_028:sink_valid
	wire  [116:0] u_gpo_2_s1_agent_rp_data;                                                      // u_gpo_2_s1_agent:rp_data -> router_028:sink_data
	wire          u_gpo_2_s1_agent_rp_ready;                                                     // router_028:sink_ready -> u_gpo_2_s1_agent:rp_ready
	wire          u_gpo_2_s1_agent_rp_startofpacket;                                             // u_gpo_2_s1_agent:rp_startofpacket -> router_028:sink_startofpacket
	wire          u_gpo_2_s1_agent_rp_endofpacket;                                               // u_gpo_2_s1_agent:rp_endofpacket -> router_028:sink_endofpacket
	wire          router_028_src_valid;                                                          // router_028:src_valid -> rsp_demux_025:sink_valid
	wire  [116:0] router_028_src_data;                                                           // router_028:src_data -> rsp_demux_025:sink_data
	wire          router_028_src_ready;                                                          // rsp_demux_025:sink_ready -> router_028:src_ready
	wire   [25:0] router_028_src_channel;                                                        // router_028:src_channel -> rsp_demux_025:sink_channel
	wire          router_028_src_startofpacket;                                                  // router_028:src_startofpacket -> rsp_demux_025:sink_startofpacket
	wire          router_028_src_endofpacket;                                                    // router_028:src_endofpacket -> rsp_demux_025:sink_endofpacket
	wire          cmd_mux_src_valid;                                                             // cmd_mux:src_valid -> u_ufm_data_burst_adapter:sink0_valid
	wire  [116:0] cmd_mux_src_data;                                                              // cmd_mux:src_data -> u_ufm_data_burst_adapter:sink0_data
	wire          cmd_mux_src_ready;                                                             // u_ufm_data_burst_adapter:sink0_ready -> cmd_mux:src_ready
	wire   [25:0] cmd_mux_src_channel;                                                           // cmd_mux:src_channel -> u_ufm_data_burst_adapter:sink0_channel
	wire          cmd_mux_src_startofpacket;                                                     // cmd_mux:src_startofpacket -> u_ufm_data_burst_adapter:sink0_startofpacket
	wire          cmd_mux_src_endofpacket;                                                       // cmd_mux:src_endofpacket -> u_ufm_data_burst_adapter:sink0_endofpacket
	wire          u_ufm_data_burst_adapter_source0_valid;                                        // u_ufm_data_burst_adapter:source0_valid -> u_ufm_data_agent:cp_valid
	wire  [116:0] u_ufm_data_burst_adapter_source0_data;                                         // u_ufm_data_burst_adapter:source0_data -> u_ufm_data_agent:cp_data
	wire          u_ufm_data_burst_adapter_source0_ready;                                        // u_ufm_data_agent:cp_ready -> u_ufm_data_burst_adapter:source0_ready
	wire   [25:0] u_ufm_data_burst_adapter_source0_channel;                                      // u_ufm_data_burst_adapter:source0_channel -> u_ufm_data_agent:cp_channel
	wire          u_ufm_data_burst_adapter_source0_startofpacket;                                // u_ufm_data_burst_adapter:source0_startofpacket -> u_ufm_data_agent:cp_startofpacket
	wire          u_ufm_data_burst_adapter_source0_endofpacket;                                  // u_ufm_data_burst_adapter:source0_endofpacket -> u_ufm_data_agent:cp_endofpacket
	wire          cmd_demux_src0_valid;                                                          // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire  [116:0] cmd_demux_src0_data;                                                           // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire          cmd_demux_src0_ready;                                                          // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire   [25:0] cmd_demux_src0_channel;                                                        // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire          cmd_demux_src0_startofpacket;                                                  // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire          cmd_demux_src0_endofpacket;                                                    // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire          cmd_demux_001_src0_valid;                                                      // cmd_demux_001:src0_valid -> cmd_mux:sink1_valid
	wire  [116:0] cmd_demux_001_src0_data;                                                       // cmd_demux_001:src0_data -> cmd_mux:sink1_data
	wire          cmd_demux_001_src0_ready;                                                      // cmd_mux:sink1_ready -> cmd_demux_001:src0_ready
	wire   [25:0] cmd_demux_001_src0_channel;                                                    // cmd_demux_001:src0_channel -> cmd_mux:sink1_channel
	wire          cmd_demux_001_src0_startofpacket;                                              // cmd_demux_001:src0_startofpacket -> cmd_mux:sink1_startofpacket
	wire          cmd_demux_001_src0_endofpacket;                                                // cmd_demux_001:src0_endofpacket -> cmd_mux:sink1_endofpacket
	wire          cmd_demux_001_src1_valid;                                                      // cmd_demux_001:src1_valid -> cmd_mux_001:sink0_valid
	wire  [116:0] cmd_demux_001_src1_data;                                                       // cmd_demux_001:src1_data -> cmd_mux_001:sink0_data
	wire          cmd_demux_001_src1_ready;                                                      // cmd_mux_001:sink0_ready -> cmd_demux_001:src1_ready
	wire   [25:0] cmd_demux_001_src1_channel;                                                    // cmd_demux_001:src1_channel -> cmd_mux_001:sink0_channel
	wire          cmd_demux_001_src1_startofpacket;                                              // cmd_demux_001:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
	wire          cmd_demux_001_src1_endofpacket;                                                // cmd_demux_001:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
	wire          cmd_demux_001_src2_valid;                                                      // cmd_demux_001:src2_valid -> cmd_mux_002:sink0_valid
	wire  [116:0] cmd_demux_001_src2_data;                                                       // cmd_demux_001:src2_data -> cmd_mux_002:sink0_data
	wire          cmd_demux_001_src2_ready;                                                      // cmd_mux_002:sink0_ready -> cmd_demux_001:src2_ready
	wire   [25:0] cmd_demux_001_src2_channel;                                                    // cmd_demux_001:src2_channel -> cmd_mux_002:sink0_channel
	wire          cmd_demux_001_src2_startofpacket;                                              // cmd_demux_001:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
	wire          cmd_demux_001_src2_endofpacket;                                                // cmd_demux_001:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
	wire          cmd_demux_001_src3_valid;                                                      // cmd_demux_001:src3_valid -> cmd_mux_003:sink0_valid
	wire  [116:0] cmd_demux_001_src3_data;                                                       // cmd_demux_001:src3_data -> cmd_mux_003:sink0_data
	wire          cmd_demux_001_src3_ready;                                                      // cmd_mux_003:sink0_ready -> cmd_demux_001:src3_ready
	wire   [25:0] cmd_demux_001_src3_channel;                                                    // cmd_demux_001:src3_channel -> cmd_mux_003:sink0_channel
	wire          cmd_demux_001_src3_startofpacket;                                              // cmd_demux_001:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
	wire          cmd_demux_001_src3_endofpacket;                                                // cmd_demux_001:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
	wire          cmd_demux_001_src4_valid;                                                      // cmd_demux_001:src4_valid -> cmd_mux_004:sink0_valid
	wire  [116:0] cmd_demux_001_src4_data;                                                       // cmd_demux_001:src4_data -> cmd_mux_004:sink0_data
	wire          cmd_demux_001_src4_ready;                                                      // cmd_mux_004:sink0_ready -> cmd_demux_001:src4_ready
	wire   [25:0] cmd_demux_001_src4_channel;                                                    // cmd_demux_001:src4_channel -> cmd_mux_004:sink0_channel
	wire          cmd_demux_001_src4_startofpacket;                                              // cmd_demux_001:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
	wire          cmd_demux_001_src4_endofpacket;                                                // cmd_demux_001:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
	wire          cmd_demux_001_src6_valid;                                                      // cmd_demux_001:src6_valid -> cmd_mux_006:sink0_valid
	wire  [116:0] cmd_demux_001_src6_data;                                                       // cmd_demux_001:src6_data -> cmd_mux_006:sink0_data
	wire          cmd_demux_001_src6_ready;                                                      // cmd_mux_006:sink0_ready -> cmd_demux_001:src6_ready
	wire   [25:0] cmd_demux_001_src6_channel;                                                    // cmd_demux_001:src6_channel -> cmd_mux_006:sink0_channel
	wire          cmd_demux_001_src6_startofpacket;                                              // cmd_demux_001:src6_startofpacket -> cmd_mux_006:sink0_startofpacket
	wire          cmd_demux_001_src6_endofpacket;                                                // cmd_demux_001:src6_endofpacket -> cmd_mux_006:sink0_endofpacket
	wire          cmd_demux_001_src7_valid;                                                      // cmd_demux_001:src7_valid -> cmd_mux_007:sink0_valid
	wire  [116:0] cmd_demux_001_src7_data;                                                       // cmd_demux_001:src7_data -> cmd_mux_007:sink0_data
	wire          cmd_demux_001_src7_ready;                                                      // cmd_mux_007:sink0_ready -> cmd_demux_001:src7_ready
	wire   [25:0] cmd_demux_001_src7_channel;                                                    // cmd_demux_001:src7_channel -> cmd_mux_007:sink0_channel
	wire          cmd_demux_001_src7_startofpacket;                                              // cmd_demux_001:src7_startofpacket -> cmd_mux_007:sink0_startofpacket
	wire          cmd_demux_001_src7_endofpacket;                                                // cmd_demux_001:src7_endofpacket -> cmd_mux_007:sink0_endofpacket
	wire          cmd_demux_001_src8_valid;                                                      // cmd_demux_001:src8_valid -> cmd_mux_008:sink0_valid
	wire  [116:0] cmd_demux_001_src8_data;                                                       // cmd_demux_001:src8_data -> cmd_mux_008:sink0_data
	wire          cmd_demux_001_src8_ready;                                                      // cmd_mux_008:sink0_ready -> cmd_demux_001:src8_ready
	wire   [25:0] cmd_demux_001_src8_channel;                                                    // cmd_demux_001:src8_channel -> cmd_mux_008:sink0_channel
	wire          cmd_demux_001_src8_startofpacket;                                              // cmd_demux_001:src8_startofpacket -> cmd_mux_008:sink0_startofpacket
	wire          cmd_demux_001_src8_endofpacket;                                                // cmd_demux_001:src8_endofpacket -> cmd_mux_008:sink0_endofpacket
	wire          cmd_demux_001_src10_valid;                                                     // cmd_demux_001:src10_valid -> cmd_mux_010:sink0_valid
	wire  [116:0] cmd_demux_001_src10_data;                                                      // cmd_demux_001:src10_data -> cmd_mux_010:sink0_data
	wire          cmd_demux_001_src10_ready;                                                     // cmd_mux_010:sink0_ready -> cmd_demux_001:src10_ready
	wire   [25:0] cmd_demux_001_src10_channel;                                                   // cmd_demux_001:src10_channel -> cmd_mux_010:sink0_channel
	wire          cmd_demux_001_src10_startofpacket;                                             // cmd_demux_001:src10_startofpacket -> cmd_mux_010:sink0_startofpacket
	wire          cmd_demux_001_src10_endofpacket;                                               // cmd_demux_001:src10_endofpacket -> cmd_mux_010:sink0_endofpacket
	wire          cmd_demux_001_src11_valid;                                                     // cmd_demux_001:src11_valid -> cmd_mux_011:sink0_valid
	wire  [116:0] cmd_demux_001_src11_data;                                                      // cmd_demux_001:src11_data -> cmd_mux_011:sink0_data
	wire          cmd_demux_001_src11_ready;                                                     // cmd_mux_011:sink0_ready -> cmd_demux_001:src11_ready
	wire   [25:0] cmd_demux_001_src11_channel;                                                   // cmd_demux_001:src11_channel -> cmd_mux_011:sink0_channel
	wire          cmd_demux_001_src11_startofpacket;                                             // cmd_demux_001:src11_startofpacket -> cmd_mux_011:sink0_startofpacket
	wire          cmd_demux_001_src11_endofpacket;                                               // cmd_demux_001:src11_endofpacket -> cmd_mux_011:sink0_endofpacket
	wire          cmd_demux_001_src12_valid;                                                     // cmd_demux_001:src12_valid -> cmd_mux_012:sink0_valid
	wire  [116:0] cmd_demux_001_src12_data;                                                      // cmd_demux_001:src12_data -> cmd_mux_012:sink0_data
	wire          cmd_demux_001_src12_ready;                                                     // cmd_mux_012:sink0_ready -> cmd_demux_001:src12_ready
	wire   [25:0] cmd_demux_001_src12_channel;                                                   // cmd_demux_001:src12_channel -> cmd_mux_012:sink0_channel
	wire          cmd_demux_001_src12_startofpacket;                                             // cmd_demux_001:src12_startofpacket -> cmd_mux_012:sink0_startofpacket
	wire          cmd_demux_001_src12_endofpacket;                                               // cmd_demux_001:src12_endofpacket -> cmd_mux_012:sink0_endofpacket
	wire          cmd_demux_001_src13_valid;                                                     // cmd_demux_001:src13_valid -> cmd_mux_013:sink0_valid
	wire  [116:0] cmd_demux_001_src13_data;                                                      // cmd_demux_001:src13_data -> cmd_mux_013:sink0_data
	wire          cmd_demux_001_src13_ready;                                                     // cmd_mux_013:sink0_ready -> cmd_demux_001:src13_ready
	wire   [25:0] cmd_demux_001_src13_channel;                                                   // cmd_demux_001:src13_channel -> cmd_mux_013:sink0_channel
	wire          cmd_demux_001_src13_startofpacket;                                             // cmd_demux_001:src13_startofpacket -> cmd_mux_013:sink0_startofpacket
	wire          cmd_demux_001_src13_endofpacket;                                               // cmd_demux_001:src13_endofpacket -> cmd_mux_013:sink0_endofpacket
	wire          cmd_demux_001_src14_valid;                                                     // cmd_demux_001:src14_valid -> cmd_mux_014:sink0_valid
	wire  [116:0] cmd_demux_001_src14_data;                                                      // cmd_demux_001:src14_data -> cmd_mux_014:sink0_data
	wire          cmd_demux_001_src14_ready;                                                     // cmd_mux_014:sink0_ready -> cmd_demux_001:src14_ready
	wire   [25:0] cmd_demux_001_src14_channel;                                                   // cmd_demux_001:src14_channel -> cmd_mux_014:sink0_channel
	wire          cmd_demux_001_src14_startofpacket;                                             // cmd_demux_001:src14_startofpacket -> cmd_mux_014:sink0_startofpacket
	wire          cmd_demux_001_src14_endofpacket;                                               // cmd_demux_001:src14_endofpacket -> cmd_mux_014:sink0_endofpacket
	wire          cmd_demux_001_src16_valid;                                                     // cmd_demux_001:src16_valid -> cmd_mux_016:sink0_valid
	wire  [116:0] cmd_demux_001_src16_data;                                                      // cmd_demux_001:src16_data -> cmd_mux_016:sink0_data
	wire          cmd_demux_001_src16_ready;                                                     // cmd_mux_016:sink0_ready -> cmd_demux_001:src16_ready
	wire   [25:0] cmd_demux_001_src16_channel;                                                   // cmd_demux_001:src16_channel -> cmd_mux_016:sink0_channel
	wire          cmd_demux_001_src16_startofpacket;                                             // cmd_demux_001:src16_startofpacket -> cmd_mux_016:sink0_startofpacket
	wire          cmd_demux_001_src16_endofpacket;                                               // cmd_demux_001:src16_endofpacket -> cmd_mux_016:sink0_endofpacket
	wire          cmd_demux_001_src17_valid;                                                     // cmd_demux_001:src17_valid -> cmd_mux_017:sink0_valid
	wire  [116:0] cmd_demux_001_src17_data;                                                      // cmd_demux_001:src17_data -> cmd_mux_017:sink0_data
	wire          cmd_demux_001_src17_ready;                                                     // cmd_mux_017:sink0_ready -> cmd_demux_001:src17_ready
	wire   [25:0] cmd_demux_001_src17_channel;                                                   // cmd_demux_001:src17_channel -> cmd_mux_017:sink0_channel
	wire          cmd_demux_001_src17_startofpacket;                                             // cmd_demux_001:src17_startofpacket -> cmd_mux_017:sink0_startofpacket
	wire          cmd_demux_001_src17_endofpacket;                                               // cmd_demux_001:src17_endofpacket -> cmd_mux_017:sink0_endofpacket
	wire          cmd_demux_001_src18_valid;                                                     // cmd_demux_001:src18_valid -> cmd_mux_018:sink0_valid
	wire  [116:0] cmd_demux_001_src18_data;                                                      // cmd_demux_001:src18_data -> cmd_mux_018:sink0_data
	wire          cmd_demux_001_src18_ready;                                                     // cmd_mux_018:sink0_ready -> cmd_demux_001:src18_ready
	wire   [25:0] cmd_demux_001_src18_channel;                                                   // cmd_demux_001:src18_channel -> cmd_mux_018:sink0_channel
	wire          cmd_demux_001_src18_startofpacket;                                             // cmd_demux_001:src18_startofpacket -> cmd_mux_018:sink0_startofpacket
	wire          cmd_demux_001_src18_endofpacket;                                               // cmd_demux_001:src18_endofpacket -> cmd_mux_018:sink0_endofpacket
	wire          cmd_demux_001_src19_valid;                                                     // cmd_demux_001:src19_valid -> cmd_mux_019:sink0_valid
	wire  [116:0] cmd_demux_001_src19_data;                                                      // cmd_demux_001:src19_data -> cmd_mux_019:sink0_data
	wire          cmd_demux_001_src19_ready;                                                     // cmd_mux_019:sink0_ready -> cmd_demux_001:src19_ready
	wire   [25:0] cmd_demux_001_src19_channel;                                                   // cmd_demux_001:src19_channel -> cmd_mux_019:sink0_channel
	wire          cmd_demux_001_src19_startofpacket;                                             // cmd_demux_001:src19_startofpacket -> cmd_mux_019:sink0_startofpacket
	wire          cmd_demux_001_src19_endofpacket;                                               // cmd_demux_001:src19_endofpacket -> cmd_mux_019:sink0_endofpacket
	wire          cmd_demux_001_src20_valid;                                                     // cmd_demux_001:src20_valid -> cmd_mux_020:sink0_valid
	wire  [116:0] cmd_demux_001_src20_data;                                                      // cmd_demux_001:src20_data -> cmd_mux_020:sink0_data
	wire          cmd_demux_001_src20_ready;                                                     // cmd_mux_020:sink0_ready -> cmd_demux_001:src20_ready
	wire   [25:0] cmd_demux_001_src20_channel;                                                   // cmd_demux_001:src20_channel -> cmd_mux_020:sink0_channel
	wire          cmd_demux_001_src20_startofpacket;                                             // cmd_demux_001:src20_startofpacket -> cmd_mux_020:sink0_startofpacket
	wire          cmd_demux_001_src20_endofpacket;                                               // cmd_demux_001:src20_endofpacket -> cmd_mux_020:sink0_endofpacket
	wire          cmd_demux_001_src21_valid;                                                     // cmd_demux_001:src21_valid -> cmd_mux_021:sink0_valid
	wire  [116:0] cmd_demux_001_src21_data;                                                      // cmd_demux_001:src21_data -> cmd_mux_021:sink0_data
	wire          cmd_demux_001_src21_ready;                                                     // cmd_mux_021:sink0_ready -> cmd_demux_001:src21_ready
	wire   [25:0] cmd_demux_001_src21_channel;                                                   // cmd_demux_001:src21_channel -> cmd_mux_021:sink0_channel
	wire          cmd_demux_001_src21_startofpacket;                                             // cmd_demux_001:src21_startofpacket -> cmd_mux_021:sink0_startofpacket
	wire          cmd_demux_001_src21_endofpacket;                                               // cmd_demux_001:src21_endofpacket -> cmd_mux_021:sink0_endofpacket
	wire          cmd_demux_001_src22_valid;                                                     // cmd_demux_001:src22_valid -> cmd_mux_022:sink0_valid
	wire  [116:0] cmd_demux_001_src22_data;                                                      // cmd_demux_001:src22_data -> cmd_mux_022:sink0_data
	wire          cmd_demux_001_src22_ready;                                                     // cmd_mux_022:sink0_ready -> cmd_demux_001:src22_ready
	wire   [25:0] cmd_demux_001_src22_channel;                                                   // cmd_demux_001:src22_channel -> cmd_mux_022:sink0_channel
	wire          cmd_demux_001_src22_startofpacket;                                             // cmd_demux_001:src22_startofpacket -> cmd_mux_022:sink0_startofpacket
	wire          cmd_demux_001_src22_endofpacket;                                               // cmd_demux_001:src22_endofpacket -> cmd_mux_022:sink0_endofpacket
	wire          cmd_demux_001_src23_valid;                                                     // cmd_demux_001:src23_valid -> cmd_mux_023:sink0_valid
	wire  [116:0] cmd_demux_001_src23_data;                                                      // cmd_demux_001:src23_data -> cmd_mux_023:sink0_data
	wire          cmd_demux_001_src23_ready;                                                     // cmd_mux_023:sink0_ready -> cmd_demux_001:src23_ready
	wire   [25:0] cmd_demux_001_src23_channel;                                                   // cmd_demux_001:src23_channel -> cmd_mux_023:sink0_channel
	wire          cmd_demux_001_src23_startofpacket;                                             // cmd_demux_001:src23_startofpacket -> cmd_mux_023:sink0_startofpacket
	wire          cmd_demux_001_src23_endofpacket;                                               // cmd_demux_001:src23_endofpacket -> cmd_mux_023:sink0_endofpacket
	wire          cmd_demux_001_src24_valid;                                                     // cmd_demux_001:src24_valid -> cmd_mux_024:sink0_valid
	wire  [116:0] cmd_demux_001_src24_data;                                                      // cmd_demux_001:src24_data -> cmd_mux_024:sink0_data
	wire          cmd_demux_001_src24_ready;                                                     // cmd_mux_024:sink0_ready -> cmd_demux_001:src24_ready
	wire   [25:0] cmd_demux_001_src24_channel;                                                   // cmd_demux_001:src24_channel -> cmd_mux_024:sink0_channel
	wire          cmd_demux_001_src24_startofpacket;                                             // cmd_demux_001:src24_startofpacket -> cmd_mux_024:sink0_startofpacket
	wire          cmd_demux_001_src24_endofpacket;                                               // cmd_demux_001:src24_endofpacket -> cmd_mux_024:sink0_endofpacket
	wire          cmd_demux_001_src25_valid;                                                     // cmd_demux_001:src25_valid -> cmd_mux_025:sink0_valid
	wire  [116:0] cmd_demux_001_src25_data;                                                      // cmd_demux_001:src25_data -> cmd_mux_025:sink0_data
	wire          cmd_demux_001_src25_ready;                                                     // cmd_mux_025:sink0_ready -> cmd_demux_001:src25_ready
	wire   [25:0] cmd_demux_001_src25_channel;                                                   // cmd_demux_001:src25_channel -> cmd_mux_025:sink0_channel
	wire          cmd_demux_001_src25_startofpacket;                                             // cmd_demux_001:src25_startofpacket -> cmd_mux_025:sink0_startofpacket
	wire          cmd_demux_001_src25_endofpacket;                                               // cmd_demux_001:src25_endofpacket -> cmd_mux_025:sink0_endofpacket
	wire          cmd_demux_002_src0_valid;                                                      // cmd_demux_002:src0_valid -> cmd_mux:sink2_valid
	wire  [116:0] cmd_demux_002_src0_data;                                                       // cmd_demux_002:src0_data -> cmd_mux:sink2_data
	wire          cmd_demux_002_src0_ready;                                                      // cmd_mux:sink2_ready -> cmd_demux_002:src0_ready
	wire   [25:0] cmd_demux_002_src0_channel;                                                    // cmd_demux_002:src0_channel -> cmd_mux:sink2_channel
	wire          cmd_demux_002_src0_startofpacket;                                              // cmd_demux_002:src0_startofpacket -> cmd_mux:sink2_startofpacket
	wire          cmd_demux_002_src0_endofpacket;                                                // cmd_demux_002:src0_endofpacket -> cmd_mux:sink2_endofpacket
	wire          cmd_demux_002_src1_valid;                                                      // cmd_demux_002:src1_valid -> cmd_mux_001:sink1_valid
	wire  [116:0] cmd_demux_002_src1_data;                                                       // cmd_demux_002:src1_data -> cmd_mux_001:sink1_data
	wire          cmd_demux_002_src1_ready;                                                      // cmd_mux_001:sink1_ready -> cmd_demux_002:src1_ready
	wire   [25:0] cmd_demux_002_src1_channel;                                                    // cmd_demux_002:src1_channel -> cmd_mux_001:sink1_channel
	wire          cmd_demux_002_src1_startofpacket;                                              // cmd_demux_002:src1_startofpacket -> cmd_mux_001:sink1_startofpacket
	wire          cmd_demux_002_src1_endofpacket;                                                // cmd_demux_002:src1_endofpacket -> cmd_mux_001:sink1_endofpacket
	wire          cmd_demux_002_src2_valid;                                                      // cmd_demux_002:src2_valid -> cmd_mux_002:sink1_valid
	wire  [116:0] cmd_demux_002_src2_data;                                                       // cmd_demux_002:src2_data -> cmd_mux_002:sink1_data
	wire          cmd_demux_002_src2_ready;                                                      // cmd_mux_002:sink1_ready -> cmd_demux_002:src2_ready
	wire   [25:0] cmd_demux_002_src2_channel;                                                    // cmd_demux_002:src2_channel -> cmd_mux_002:sink1_channel
	wire          cmd_demux_002_src2_startofpacket;                                              // cmd_demux_002:src2_startofpacket -> cmd_mux_002:sink1_startofpacket
	wire          cmd_demux_002_src2_endofpacket;                                                // cmd_demux_002:src2_endofpacket -> cmd_mux_002:sink1_endofpacket
	wire          rsp_demux_src0_valid;                                                          // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire  [116:0] rsp_demux_src0_data;                                                           // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire          rsp_demux_src0_ready;                                                          // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire   [25:0] rsp_demux_src0_channel;                                                        // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire          rsp_demux_src0_startofpacket;                                                  // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire          rsp_demux_src0_endofpacket;                                                    // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire          rsp_demux_src1_valid;                                                          // rsp_demux:src1_valid -> rsp_mux_001:sink0_valid
	wire  [116:0] rsp_demux_src1_data;                                                           // rsp_demux:src1_data -> rsp_mux_001:sink0_data
	wire          rsp_demux_src1_ready;                                                          // rsp_mux_001:sink0_ready -> rsp_demux:src1_ready
	wire   [25:0] rsp_demux_src1_channel;                                                        // rsp_demux:src1_channel -> rsp_mux_001:sink0_channel
	wire          rsp_demux_src1_startofpacket;                                                  // rsp_demux:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
	wire          rsp_demux_src1_endofpacket;                                                    // rsp_demux:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
	wire          rsp_demux_src2_valid;                                                          // rsp_demux:src2_valid -> rsp_mux_002:sink0_valid
	wire  [116:0] rsp_demux_src2_data;                                                           // rsp_demux:src2_data -> rsp_mux_002:sink0_data
	wire          rsp_demux_src2_ready;                                                          // rsp_mux_002:sink0_ready -> rsp_demux:src2_ready
	wire   [25:0] rsp_demux_src2_channel;                                                        // rsp_demux:src2_channel -> rsp_mux_002:sink0_channel
	wire          rsp_demux_src2_startofpacket;                                                  // rsp_demux:src2_startofpacket -> rsp_mux_002:sink0_startofpacket
	wire          rsp_demux_src2_endofpacket;                                                    // rsp_demux:src2_endofpacket -> rsp_mux_002:sink0_endofpacket
	wire          rsp_demux_001_src0_valid;                                                      // rsp_demux_001:src0_valid -> rsp_mux_001:sink1_valid
	wire  [116:0] rsp_demux_001_src0_data;                                                       // rsp_demux_001:src0_data -> rsp_mux_001:sink1_data
	wire          rsp_demux_001_src0_ready;                                                      // rsp_mux_001:sink1_ready -> rsp_demux_001:src0_ready
	wire   [25:0] rsp_demux_001_src0_channel;                                                    // rsp_demux_001:src0_channel -> rsp_mux_001:sink1_channel
	wire          rsp_demux_001_src0_startofpacket;                                              // rsp_demux_001:src0_startofpacket -> rsp_mux_001:sink1_startofpacket
	wire          rsp_demux_001_src0_endofpacket;                                                // rsp_demux_001:src0_endofpacket -> rsp_mux_001:sink1_endofpacket
	wire          rsp_demux_001_src1_valid;                                                      // rsp_demux_001:src1_valid -> rsp_mux_002:sink1_valid
	wire  [116:0] rsp_demux_001_src1_data;                                                       // rsp_demux_001:src1_data -> rsp_mux_002:sink1_data
	wire          rsp_demux_001_src1_ready;                                                      // rsp_mux_002:sink1_ready -> rsp_demux_001:src1_ready
	wire   [25:0] rsp_demux_001_src1_channel;                                                    // rsp_demux_001:src1_channel -> rsp_mux_002:sink1_channel
	wire          rsp_demux_001_src1_startofpacket;                                              // rsp_demux_001:src1_startofpacket -> rsp_mux_002:sink1_startofpacket
	wire          rsp_demux_001_src1_endofpacket;                                                // rsp_demux_001:src1_endofpacket -> rsp_mux_002:sink1_endofpacket
	wire          rsp_demux_002_src0_valid;                                                      // rsp_demux_002:src0_valid -> rsp_mux_001:sink2_valid
	wire  [116:0] rsp_demux_002_src0_data;                                                       // rsp_demux_002:src0_data -> rsp_mux_001:sink2_data
	wire          rsp_demux_002_src0_ready;                                                      // rsp_mux_001:sink2_ready -> rsp_demux_002:src0_ready
	wire   [25:0] rsp_demux_002_src0_channel;                                                    // rsp_demux_002:src0_channel -> rsp_mux_001:sink2_channel
	wire          rsp_demux_002_src0_startofpacket;                                              // rsp_demux_002:src0_startofpacket -> rsp_mux_001:sink2_startofpacket
	wire          rsp_demux_002_src0_endofpacket;                                                // rsp_demux_002:src0_endofpacket -> rsp_mux_001:sink2_endofpacket
	wire          rsp_demux_002_src1_valid;                                                      // rsp_demux_002:src1_valid -> rsp_mux_002:sink2_valid
	wire  [116:0] rsp_demux_002_src1_data;                                                       // rsp_demux_002:src1_data -> rsp_mux_002:sink2_data
	wire          rsp_demux_002_src1_ready;                                                      // rsp_mux_002:sink2_ready -> rsp_demux_002:src1_ready
	wire   [25:0] rsp_demux_002_src1_channel;                                                    // rsp_demux_002:src1_channel -> rsp_mux_002:sink2_channel
	wire          rsp_demux_002_src1_startofpacket;                                              // rsp_demux_002:src1_startofpacket -> rsp_mux_002:sink2_startofpacket
	wire          rsp_demux_002_src1_endofpacket;                                                // rsp_demux_002:src1_endofpacket -> rsp_mux_002:sink2_endofpacket
	wire          rsp_demux_003_src0_valid;                                                      // rsp_demux_003:src0_valid -> rsp_mux_001:sink3_valid
	wire  [116:0] rsp_demux_003_src0_data;                                                       // rsp_demux_003:src0_data -> rsp_mux_001:sink3_data
	wire          rsp_demux_003_src0_ready;                                                      // rsp_mux_001:sink3_ready -> rsp_demux_003:src0_ready
	wire   [25:0] rsp_demux_003_src0_channel;                                                    // rsp_demux_003:src0_channel -> rsp_mux_001:sink3_channel
	wire          rsp_demux_003_src0_startofpacket;                                              // rsp_demux_003:src0_startofpacket -> rsp_mux_001:sink3_startofpacket
	wire          rsp_demux_003_src0_endofpacket;                                                // rsp_demux_003:src0_endofpacket -> rsp_mux_001:sink3_endofpacket
	wire          rsp_demux_004_src0_valid;                                                      // rsp_demux_004:src0_valid -> rsp_mux_001:sink4_valid
	wire  [116:0] rsp_demux_004_src0_data;                                                       // rsp_demux_004:src0_data -> rsp_mux_001:sink4_data
	wire          rsp_demux_004_src0_ready;                                                      // rsp_mux_001:sink4_ready -> rsp_demux_004:src0_ready
	wire   [25:0] rsp_demux_004_src0_channel;                                                    // rsp_demux_004:src0_channel -> rsp_mux_001:sink4_channel
	wire          rsp_demux_004_src0_startofpacket;                                              // rsp_demux_004:src0_startofpacket -> rsp_mux_001:sink4_startofpacket
	wire          rsp_demux_004_src0_endofpacket;                                                // rsp_demux_004:src0_endofpacket -> rsp_mux_001:sink4_endofpacket
	wire          rsp_demux_006_src0_valid;                                                      // rsp_demux_006:src0_valid -> rsp_mux_001:sink6_valid
	wire  [116:0] rsp_demux_006_src0_data;                                                       // rsp_demux_006:src0_data -> rsp_mux_001:sink6_data
	wire          rsp_demux_006_src0_ready;                                                      // rsp_mux_001:sink6_ready -> rsp_demux_006:src0_ready
	wire   [25:0] rsp_demux_006_src0_channel;                                                    // rsp_demux_006:src0_channel -> rsp_mux_001:sink6_channel
	wire          rsp_demux_006_src0_startofpacket;                                              // rsp_demux_006:src0_startofpacket -> rsp_mux_001:sink6_startofpacket
	wire          rsp_demux_006_src0_endofpacket;                                                // rsp_demux_006:src0_endofpacket -> rsp_mux_001:sink6_endofpacket
	wire          rsp_demux_007_src0_valid;                                                      // rsp_demux_007:src0_valid -> rsp_mux_001:sink7_valid
	wire  [116:0] rsp_demux_007_src0_data;                                                       // rsp_demux_007:src0_data -> rsp_mux_001:sink7_data
	wire          rsp_demux_007_src0_ready;                                                      // rsp_mux_001:sink7_ready -> rsp_demux_007:src0_ready
	wire   [25:0] rsp_demux_007_src0_channel;                                                    // rsp_demux_007:src0_channel -> rsp_mux_001:sink7_channel
	wire          rsp_demux_007_src0_startofpacket;                                              // rsp_demux_007:src0_startofpacket -> rsp_mux_001:sink7_startofpacket
	wire          rsp_demux_007_src0_endofpacket;                                                // rsp_demux_007:src0_endofpacket -> rsp_mux_001:sink7_endofpacket
	wire          rsp_demux_008_src0_valid;                                                      // rsp_demux_008:src0_valid -> rsp_mux_001:sink8_valid
	wire  [116:0] rsp_demux_008_src0_data;                                                       // rsp_demux_008:src0_data -> rsp_mux_001:sink8_data
	wire          rsp_demux_008_src0_ready;                                                      // rsp_mux_001:sink8_ready -> rsp_demux_008:src0_ready
	wire   [25:0] rsp_demux_008_src0_channel;                                                    // rsp_demux_008:src0_channel -> rsp_mux_001:sink8_channel
	wire          rsp_demux_008_src0_startofpacket;                                              // rsp_demux_008:src0_startofpacket -> rsp_mux_001:sink8_startofpacket
	wire          rsp_demux_008_src0_endofpacket;                                                // rsp_demux_008:src0_endofpacket -> rsp_mux_001:sink8_endofpacket
	wire          rsp_demux_010_src0_valid;                                                      // rsp_demux_010:src0_valid -> rsp_mux_001:sink10_valid
	wire  [116:0] rsp_demux_010_src0_data;                                                       // rsp_demux_010:src0_data -> rsp_mux_001:sink10_data
	wire          rsp_demux_010_src0_ready;                                                      // rsp_mux_001:sink10_ready -> rsp_demux_010:src0_ready
	wire   [25:0] rsp_demux_010_src0_channel;                                                    // rsp_demux_010:src0_channel -> rsp_mux_001:sink10_channel
	wire          rsp_demux_010_src0_startofpacket;                                              // rsp_demux_010:src0_startofpacket -> rsp_mux_001:sink10_startofpacket
	wire          rsp_demux_010_src0_endofpacket;                                                // rsp_demux_010:src0_endofpacket -> rsp_mux_001:sink10_endofpacket
	wire          rsp_demux_011_src0_valid;                                                      // rsp_demux_011:src0_valid -> rsp_mux_001:sink11_valid
	wire  [116:0] rsp_demux_011_src0_data;                                                       // rsp_demux_011:src0_data -> rsp_mux_001:sink11_data
	wire          rsp_demux_011_src0_ready;                                                      // rsp_mux_001:sink11_ready -> rsp_demux_011:src0_ready
	wire   [25:0] rsp_demux_011_src0_channel;                                                    // rsp_demux_011:src0_channel -> rsp_mux_001:sink11_channel
	wire          rsp_demux_011_src0_startofpacket;                                              // rsp_demux_011:src0_startofpacket -> rsp_mux_001:sink11_startofpacket
	wire          rsp_demux_011_src0_endofpacket;                                                // rsp_demux_011:src0_endofpacket -> rsp_mux_001:sink11_endofpacket
	wire          rsp_demux_012_src0_valid;                                                      // rsp_demux_012:src0_valid -> rsp_mux_001:sink12_valid
	wire  [116:0] rsp_demux_012_src0_data;                                                       // rsp_demux_012:src0_data -> rsp_mux_001:sink12_data
	wire          rsp_demux_012_src0_ready;                                                      // rsp_mux_001:sink12_ready -> rsp_demux_012:src0_ready
	wire   [25:0] rsp_demux_012_src0_channel;                                                    // rsp_demux_012:src0_channel -> rsp_mux_001:sink12_channel
	wire          rsp_demux_012_src0_startofpacket;                                              // rsp_demux_012:src0_startofpacket -> rsp_mux_001:sink12_startofpacket
	wire          rsp_demux_012_src0_endofpacket;                                                // rsp_demux_012:src0_endofpacket -> rsp_mux_001:sink12_endofpacket
	wire          rsp_demux_013_src0_valid;                                                      // rsp_demux_013:src0_valid -> rsp_mux_001:sink13_valid
	wire  [116:0] rsp_demux_013_src0_data;                                                       // rsp_demux_013:src0_data -> rsp_mux_001:sink13_data
	wire          rsp_demux_013_src0_ready;                                                      // rsp_mux_001:sink13_ready -> rsp_demux_013:src0_ready
	wire   [25:0] rsp_demux_013_src0_channel;                                                    // rsp_demux_013:src0_channel -> rsp_mux_001:sink13_channel
	wire          rsp_demux_013_src0_startofpacket;                                              // rsp_demux_013:src0_startofpacket -> rsp_mux_001:sink13_startofpacket
	wire          rsp_demux_013_src0_endofpacket;                                                // rsp_demux_013:src0_endofpacket -> rsp_mux_001:sink13_endofpacket
	wire          rsp_demux_014_src0_valid;                                                      // rsp_demux_014:src0_valid -> rsp_mux_001:sink14_valid
	wire  [116:0] rsp_demux_014_src0_data;                                                       // rsp_demux_014:src0_data -> rsp_mux_001:sink14_data
	wire          rsp_demux_014_src0_ready;                                                      // rsp_mux_001:sink14_ready -> rsp_demux_014:src0_ready
	wire   [25:0] rsp_demux_014_src0_channel;                                                    // rsp_demux_014:src0_channel -> rsp_mux_001:sink14_channel
	wire          rsp_demux_014_src0_startofpacket;                                              // rsp_demux_014:src0_startofpacket -> rsp_mux_001:sink14_startofpacket
	wire          rsp_demux_014_src0_endofpacket;                                                // rsp_demux_014:src0_endofpacket -> rsp_mux_001:sink14_endofpacket
	wire          rsp_demux_016_src0_valid;                                                      // rsp_demux_016:src0_valid -> rsp_mux_001:sink16_valid
	wire  [116:0] rsp_demux_016_src0_data;                                                       // rsp_demux_016:src0_data -> rsp_mux_001:sink16_data
	wire          rsp_demux_016_src0_ready;                                                      // rsp_mux_001:sink16_ready -> rsp_demux_016:src0_ready
	wire   [25:0] rsp_demux_016_src0_channel;                                                    // rsp_demux_016:src0_channel -> rsp_mux_001:sink16_channel
	wire          rsp_demux_016_src0_startofpacket;                                              // rsp_demux_016:src0_startofpacket -> rsp_mux_001:sink16_startofpacket
	wire          rsp_demux_016_src0_endofpacket;                                                // rsp_demux_016:src0_endofpacket -> rsp_mux_001:sink16_endofpacket
	wire          rsp_demux_017_src0_valid;                                                      // rsp_demux_017:src0_valid -> rsp_mux_001:sink17_valid
	wire  [116:0] rsp_demux_017_src0_data;                                                       // rsp_demux_017:src0_data -> rsp_mux_001:sink17_data
	wire          rsp_demux_017_src0_ready;                                                      // rsp_mux_001:sink17_ready -> rsp_demux_017:src0_ready
	wire   [25:0] rsp_demux_017_src0_channel;                                                    // rsp_demux_017:src0_channel -> rsp_mux_001:sink17_channel
	wire          rsp_demux_017_src0_startofpacket;                                              // rsp_demux_017:src0_startofpacket -> rsp_mux_001:sink17_startofpacket
	wire          rsp_demux_017_src0_endofpacket;                                                // rsp_demux_017:src0_endofpacket -> rsp_mux_001:sink17_endofpacket
	wire          rsp_demux_018_src0_valid;                                                      // rsp_demux_018:src0_valid -> rsp_mux_001:sink18_valid
	wire  [116:0] rsp_demux_018_src0_data;                                                       // rsp_demux_018:src0_data -> rsp_mux_001:sink18_data
	wire          rsp_demux_018_src0_ready;                                                      // rsp_mux_001:sink18_ready -> rsp_demux_018:src0_ready
	wire   [25:0] rsp_demux_018_src0_channel;                                                    // rsp_demux_018:src0_channel -> rsp_mux_001:sink18_channel
	wire          rsp_demux_018_src0_startofpacket;                                              // rsp_demux_018:src0_startofpacket -> rsp_mux_001:sink18_startofpacket
	wire          rsp_demux_018_src0_endofpacket;                                                // rsp_demux_018:src0_endofpacket -> rsp_mux_001:sink18_endofpacket
	wire          rsp_demux_019_src0_valid;                                                      // rsp_demux_019:src0_valid -> rsp_mux_001:sink19_valid
	wire  [116:0] rsp_demux_019_src0_data;                                                       // rsp_demux_019:src0_data -> rsp_mux_001:sink19_data
	wire          rsp_demux_019_src0_ready;                                                      // rsp_mux_001:sink19_ready -> rsp_demux_019:src0_ready
	wire   [25:0] rsp_demux_019_src0_channel;                                                    // rsp_demux_019:src0_channel -> rsp_mux_001:sink19_channel
	wire          rsp_demux_019_src0_startofpacket;                                              // rsp_demux_019:src0_startofpacket -> rsp_mux_001:sink19_startofpacket
	wire          rsp_demux_019_src0_endofpacket;                                                // rsp_demux_019:src0_endofpacket -> rsp_mux_001:sink19_endofpacket
	wire          rsp_demux_020_src0_valid;                                                      // rsp_demux_020:src0_valid -> rsp_mux_001:sink20_valid
	wire  [116:0] rsp_demux_020_src0_data;                                                       // rsp_demux_020:src0_data -> rsp_mux_001:sink20_data
	wire          rsp_demux_020_src0_ready;                                                      // rsp_mux_001:sink20_ready -> rsp_demux_020:src0_ready
	wire   [25:0] rsp_demux_020_src0_channel;                                                    // rsp_demux_020:src0_channel -> rsp_mux_001:sink20_channel
	wire          rsp_demux_020_src0_startofpacket;                                              // rsp_demux_020:src0_startofpacket -> rsp_mux_001:sink20_startofpacket
	wire          rsp_demux_020_src0_endofpacket;                                                // rsp_demux_020:src0_endofpacket -> rsp_mux_001:sink20_endofpacket
	wire          rsp_demux_021_src0_valid;                                                      // rsp_demux_021:src0_valid -> rsp_mux_001:sink21_valid
	wire  [116:0] rsp_demux_021_src0_data;                                                       // rsp_demux_021:src0_data -> rsp_mux_001:sink21_data
	wire          rsp_demux_021_src0_ready;                                                      // rsp_mux_001:sink21_ready -> rsp_demux_021:src0_ready
	wire   [25:0] rsp_demux_021_src0_channel;                                                    // rsp_demux_021:src0_channel -> rsp_mux_001:sink21_channel
	wire          rsp_demux_021_src0_startofpacket;                                              // rsp_demux_021:src0_startofpacket -> rsp_mux_001:sink21_startofpacket
	wire          rsp_demux_021_src0_endofpacket;                                                // rsp_demux_021:src0_endofpacket -> rsp_mux_001:sink21_endofpacket
	wire          rsp_demux_022_src0_valid;                                                      // rsp_demux_022:src0_valid -> rsp_mux_001:sink22_valid
	wire  [116:0] rsp_demux_022_src0_data;                                                       // rsp_demux_022:src0_data -> rsp_mux_001:sink22_data
	wire          rsp_demux_022_src0_ready;                                                      // rsp_mux_001:sink22_ready -> rsp_demux_022:src0_ready
	wire   [25:0] rsp_demux_022_src0_channel;                                                    // rsp_demux_022:src0_channel -> rsp_mux_001:sink22_channel
	wire          rsp_demux_022_src0_startofpacket;                                              // rsp_demux_022:src0_startofpacket -> rsp_mux_001:sink22_startofpacket
	wire          rsp_demux_022_src0_endofpacket;                                                // rsp_demux_022:src0_endofpacket -> rsp_mux_001:sink22_endofpacket
	wire          rsp_demux_023_src0_valid;                                                      // rsp_demux_023:src0_valid -> rsp_mux_001:sink23_valid
	wire  [116:0] rsp_demux_023_src0_data;                                                       // rsp_demux_023:src0_data -> rsp_mux_001:sink23_data
	wire          rsp_demux_023_src0_ready;                                                      // rsp_mux_001:sink23_ready -> rsp_demux_023:src0_ready
	wire   [25:0] rsp_demux_023_src0_channel;                                                    // rsp_demux_023:src0_channel -> rsp_mux_001:sink23_channel
	wire          rsp_demux_023_src0_startofpacket;                                              // rsp_demux_023:src0_startofpacket -> rsp_mux_001:sink23_startofpacket
	wire          rsp_demux_023_src0_endofpacket;                                                // rsp_demux_023:src0_endofpacket -> rsp_mux_001:sink23_endofpacket
	wire          rsp_demux_024_src0_valid;                                                      // rsp_demux_024:src0_valid -> rsp_mux_001:sink24_valid
	wire  [116:0] rsp_demux_024_src0_data;                                                       // rsp_demux_024:src0_data -> rsp_mux_001:sink24_data
	wire          rsp_demux_024_src0_ready;                                                      // rsp_mux_001:sink24_ready -> rsp_demux_024:src0_ready
	wire   [25:0] rsp_demux_024_src0_channel;                                                    // rsp_demux_024:src0_channel -> rsp_mux_001:sink24_channel
	wire          rsp_demux_024_src0_startofpacket;                                              // rsp_demux_024:src0_startofpacket -> rsp_mux_001:sink24_startofpacket
	wire          rsp_demux_024_src0_endofpacket;                                                // rsp_demux_024:src0_endofpacket -> rsp_mux_001:sink24_endofpacket
	wire          rsp_demux_025_src0_valid;                                                      // rsp_demux_025:src0_valid -> rsp_mux_001:sink25_valid
	wire  [116:0] rsp_demux_025_src0_data;                                                       // rsp_demux_025:src0_data -> rsp_mux_001:sink25_data
	wire          rsp_demux_025_src0_ready;                                                      // rsp_mux_001:sink25_ready -> rsp_demux_025:src0_ready
	wire   [25:0] rsp_demux_025_src0_channel;                                                    // rsp_demux_025:src0_channel -> rsp_mux_001:sink25_channel
	wire          rsp_demux_025_src0_startofpacket;                                              // rsp_demux_025:src0_startofpacket -> rsp_mux_001:sink25_startofpacket
	wire          rsp_demux_025_src0_endofpacket;                                                // rsp_demux_025:src0_endofpacket -> rsp_mux_001:sink25_endofpacket
	wire          cmd_demux_001_src5_valid;                                                      // cmd_demux_001:src5_valid -> crosser:in_valid
	wire  [116:0] cmd_demux_001_src5_data;                                                       // cmd_demux_001:src5_data -> crosser:in_data
	wire          cmd_demux_001_src5_ready;                                                      // crosser:in_ready -> cmd_demux_001:src5_ready
	wire   [25:0] cmd_demux_001_src5_channel;                                                    // cmd_demux_001:src5_channel -> crosser:in_channel
	wire          cmd_demux_001_src5_startofpacket;                                              // cmd_demux_001:src5_startofpacket -> crosser:in_startofpacket
	wire          cmd_demux_001_src5_endofpacket;                                                // cmd_demux_001:src5_endofpacket -> crosser:in_endofpacket
	wire          crosser_out_valid;                                                             // crosser:out_valid -> cmd_mux_005:sink0_valid
	wire  [116:0] crosser_out_data;                                                              // crosser:out_data -> cmd_mux_005:sink0_data
	wire          crosser_out_ready;                                                             // cmd_mux_005:sink0_ready -> crosser:out_ready
	wire   [25:0] crosser_out_channel;                                                           // crosser:out_channel -> cmd_mux_005:sink0_channel
	wire          crosser_out_startofpacket;                                                     // crosser:out_startofpacket -> cmd_mux_005:sink0_startofpacket
	wire          crosser_out_endofpacket;                                                       // crosser:out_endofpacket -> cmd_mux_005:sink0_endofpacket
	wire          cmd_demux_001_src9_valid;                                                      // cmd_demux_001:src9_valid -> crosser_001:in_valid
	wire  [116:0] cmd_demux_001_src9_data;                                                       // cmd_demux_001:src9_data -> crosser_001:in_data
	wire          cmd_demux_001_src9_ready;                                                      // crosser_001:in_ready -> cmd_demux_001:src9_ready
	wire   [25:0] cmd_demux_001_src9_channel;                                                    // cmd_demux_001:src9_channel -> crosser_001:in_channel
	wire          cmd_demux_001_src9_startofpacket;                                              // cmd_demux_001:src9_startofpacket -> crosser_001:in_startofpacket
	wire          cmd_demux_001_src9_endofpacket;                                                // cmd_demux_001:src9_endofpacket -> crosser_001:in_endofpacket
	wire          crosser_001_out_valid;                                                         // crosser_001:out_valid -> cmd_mux_009:sink0_valid
	wire  [116:0] crosser_001_out_data;                                                          // crosser_001:out_data -> cmd_mux_009:sink0_data
	wire          crosser_001_out_ready;                                                         // cmd_mux_009:sink0_ready -> crosser_001:out_ready
	wire   [25:0] crosser_001_out_channel;                                                       // crosser_001:out_channel -> cmd_mux_009:sink0_channel
	wire          crosser_001_out_startofpacket;                                                 // crosser_001:out_startofpacket -> cmd_mux_009:sink0_startofpacket
	wire          crosser_001_out_endofpacket;                                                   // crosser_001:out_endofpacket -> cmd_mux_009:sink0_endofpacket
	wire          cmd_demux_001_src15_valid;                                                     // cmd_demux_001:src15_valid -> crosser_002:in_valid
	wire  [116:0] cmd_demux_001_src15_data;                                                      // cmd_demux_001:src15_data -> crosser_002:in_data
	wire          cmd_demux_001_src15_ready;                                                     // crosser_002:in_ready -> cmd_demux_001:src15_ready
	wire   [25:0] cmd_demux_001_src15_channel;                                                   // cmd_demux_001:src15_channel -> crosser_002:in_channel
	wire          cmd_demux_001_src15_startofpacket;                                             // cmd_demux_001:src15_startofpacket -> crosser_002:in_startofpacket
	wire          cmd_demux_001_src15_endofpacket;                                               // cmd_demux_001:src15_endofpacket -> crosser_002:in_endofpacket
	wire          crosser_002_out_valid;                                                         // crosser_002:out_valid -> cmd_mux_015:sink0_valid
	wire  [116:0] crosser_002_out_data;                                                          // crosser_002:out_data -> cmd_mux_015:sink0_data
	wire          crosser_002_out_ready;                                                         // cmd_mux_015:sink0_ready -> crosser_002:out_ready
	wire   [25:0] crosser_002_out_channel;                                                       // crosser_002:out_channel -> cmd_mux_015:sink0_channel
	wire          crosser_002_out_startofpacket;                                                 // crosser_002:out_startofpacket -> cmd_mux_015:sink0_startofpacket
	wire          crosser_002_out_endofpacket;                                                   // crosser_002:out_endofpacket -> cmd_mux_015:sink0_endofpacket
	wire          rsp_demux_005_src0_valid;                                                      // rsp_demux_005:src0_valid -> crosser_003:in_valid
	wire  [116:0] rsp_demux_005_src0_data;                                                       // rsp_demux_005:src0_data -> crosser_003:in_data
	wire          rsp_demux_005_src0_ready;                                                      // crosser_003:in_ready -> rsp_demux_005:src0_ready
	wire   [25:0] rsp_demux_005_src0_channel;                                                    // rsp_demux_005:src0_channel -> crosser_003:in_channel
	wire          rsp_demux_005_src0_startofpacket;                                              // rsp_demux_005:src0_startofpacket -> crosser_003:in_startofpacket
	wire          rsp_demux_005_src0_endofpacket;                                                // rsp_demux_005:src0_endofpacket -> crosser_003:in_endofpacket
	wire          crosser_003_out_valid;                                                         // crosser_003:out_valid -> rsp_mux_001:sink5_valid
	wire  [116:0] crosser_003_out_data;                                                          // crosser_003:out_data -> rsp_mux_001:sink5_data
	wire          crosser_003_out_ready;                                                         // rsp_mux_001:sink5_ready -> crosser_003:out_ready
	wire   [25:0] crosser_003_out_channel;                                                       // crosser_003:out_channel -> rsp_mux_001:sink5_channel
	wire          crosser_003_out_startofpacket;                                                 // crosser_003:out_startofpacket -> rsp_mux_001:sink5_startofpacket
	wire          crosser_003_out_endofpacket;                                                   // crosser_003:out_endofpacket -> rsp_mux_001:sink5_endofpacket
	wire          rsp_demux_009_src0_valid;                                                      // rsp_demux_009:src0_valid -> crosser_004:in_valid
	wire  [116:0] rsp_demux_009_src0_data;                                                       // rsp_demux_009:src0_data -> crosser_004:in_data
	wire          rsp_demux_009_src0_ready;                                                      // crosser_004:in_ready -> rsp_demux_009:src0_ready
	wire   [25:0] rsp_demux_009_src0_channel;                                                    // rsp_demux_009:src0_channel -> crosser_004:in_channel
	wire          rsp_demux_009_src0_startofpacket;                                              // rsp_demux_009:src0_startofpacket -> crosser_004:in_startofpacket
	wire          rsp_demux_009_src0_endofpacket;                                                // rsp_demux_009:src0_endofpacket -> crosser_004:in_endofpacket
	wire          crosser_004_out_valid;                                                         // crosser_004:out_valid -> rsp_mux_001:sink9_valid
	wire  [116:0] crosser_004_out_data;                                                          // crosser_004:out_data -> rsp_mux_001:sink9_data
	wire          crosser_004_out_ready;                                                         // rsp_mux_001:sink9_ready -> crosser_004:out_ready
	wire   [25:0] crosser_004_out_channel;                                                       // crosser_004:out_channel -> rsp_mux_001:sink9_channel
	wire          crosser_004_out_startofpacket;                                                 // crosser_004:out_startofpacket -> rsp_mux_001:sink9_startofpacket
	wire          crosser_004_out_endofpacket;                                                   // crosser_004:out_endofpacket -> rsp_mux_001:sink9_endofpacket
	wire          rsp_demux_015_src0_valid;                                                      // rsp_demux_015:src0_valid -> crosser_005:in_valid
	wire  [116:0] rsp_demux_015_src0_data;                                                       // rsp_demux_015:src0_data -> crosser_005:in_data
	wire          rsp_demux_015_src0_ready;                                                      // crosser_005:in_ready -> rsp_demux_015:src0_ready
	wire   [25:0] rsp_demux_015_src0_channel;                                                    // rsp_demux_015:src0_channel -> crosser_005:in_channel
	wire          rsp_demux_015_src0_startofpacket;                                              // rsp_demux_015:src0_startofpacket -> crosser_005:in_startofpacket
	wire          rsp_demux_015_src0_endofpacket;                                                // rsp_demux_015:src0_endofpacket -> crosser_005:in_endofpacket
	wire          crosser_005_out_valid;                                                         // crosser_005:out_valid -> rsp_mux_001:sink15_valid
	wire  [116:0] crosser_005_out_data;                                                          // crosser_005:out_data -> rsp_mux_001:sink15_data
	wire          crosser_005_out_ready;                                                         // rsp_mux_001:sink15_ready -> crosser_005:out_ready
	wire   [25:0] crosser_005_out_channel;                                                       // crosser_005:out_channel -> rsp_mux_001:sink15_channel
	wire          crosser_005_out_startofpacket;                                                 // crosser_005:out_startofpacket -> rsp_mux_001:sink15_startofpacket
	wire          crosser_005_out_endofpacket;                                                   // crosser_005:out_endofpacket -> rsp_mux_001:sink15_endofpacket
	wire          u_ufm_data_agent_rdata_fifo_src_valid;                                         // u_ufm_data_agent:rdata_fifo_src_valid -> avalon_st_adapter:in_0_valid
	wire   [33:0] u_ufm_data_agent_rdata_fifo_src_data;                                          // u_ufm_data_agent:rdata_fifo_src_data -> avalon_st_adapter:in_0_data
	wire          u_ufm_data_agent_rdata_fifo_src_ready;                                         // avalon_st_adapter:in_0_ready -> u_ufm_data_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_out_0_valid;                                                 // avalon_st_adapter:out_0_valid -> u_ufm_data_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_out_0_data;                                                  // avalon_st_adapter:out_0_data -> u_ufm_data_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_out_0_ready;                                                 // u_ufm_data_agent:rdata_fifo_sink_ready -> avalon_st_adapter:out_0_ready
	wire    [0:0] avalon_st_adapter_out_0_error;                                                 // avalon_st_adapter:out_0_error -> u_ufm_data_agent:rdata_fifo_sink_error
	wire          u_nios_debug_mem_slave_agent_rdata_fifo_src_valid;                             // u_nios_debug_mem_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_001:in_0_valid
	wire   [33:0] u_nios_debug_mem_slave_agent_rdata_fifo_src_data;                              // u_nios_debug_mem_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_001:in_0_data
	wire          u_nios_debug_mem_slave_agent_rdata_fifo_src_ready;                             // avalon_st_adapter_001:in_0_ready -> u_nios_debug_mem_slave_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_001_out_0_valid;                                             // avalon_st_adapter_001:out_0_valid -> u_nios_debug_mem_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_001_out_0_data;                                              // avalon_st_adapter_001:out_0_data -> u_nios_debug_mem_slave_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_001_out_0_ready;                                             // u_nios_debug_mem_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_001:out_0_ready
	wire    [0:0] avalon_st_adapter_001_out_0_error;                                             // avalon_st_adapter_001:out_0_error -> u_nios_debug_mem_slave_agent:rdata_fifo_sink_error
	wire          u_nios_ram_s1_agent_rdata_fifo_src_valid;                                      // u_nios_ram_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_002:in_0_valid
	wire   [33:0] u_nios_ram_s1_agent_rdata_fifo_src_data;                                       // u_nios_ram_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_002:in_0_data
	wire          u_nios_ram_s1_agent_rdata_fifo_src_ready;                                      // avalon_st_adapter_002:in_0_ready -> u_nios_ram_s1_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_002_out_0_valid;                                             // avalon_st_adapter_002:out_0_valid -> u_nios_ram_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_002_out_0_data;                                              // avalon_st_adapter_002:out_0_data -> u_nios_ram_s1_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_002_out_0_ready;                                             // u_nios_ram_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_002:out_0_ready
	wire    [0:0] avalon_st_adapter_002_out_0_error;                                             // avalon_st_adapter_002:out_0_error -> u_nios_ram_s1_agent:rdata_fifo_sink_error
	wire          u_dual_config_avalon_agent_rdata_fifo_src_valid;                               // u_dual_config_avalon_agent:rdata_fifo_src_valid -> avalon_st_adapter_003:in_0_valid
	wire   [33:0] u_dual_config_avalon_agent_rdata_fifo_src_data;                                // u_dual_config_avalon_agent:rdata_fifo_src_data -> avalon_st_adapter_003:in_0_data
	wire          u_dual_config_avalon_agent_rdata_fifo_src_ready;                               // avalon_st_adapter_003:in_0_ready -> u_dual_config_avalon_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_003_out_0_valid;                                             // avalon_st_adapter_003:out_0_valid -> u_dual_config_avalon_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_003_out_0_data;                                              // avalon_st_adapter_003:out_0_data -> u_dual_config_avalon_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_003_out_0_ready;                                             // u_dual_config_avalon_agent:rdata_fifo_sink_ready -> avalon_st_adapter_003:out_0_ready
	wire    [0:0] avalon_st_adapter_003_out_0_error;                                             // avalon_st_adapter_003:out_0_error -> u_dual_config_avalon_agent:rdata_fifo_sink_error
	wire          u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                          // u_relay1_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_004:in_0_valid
	wire   [33:0] u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_data;                           // u_relay1_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_004:in_0_data
	wire          u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                          // avalon_st_adapter_004:in_0_ready -> u_relay1_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_004_out_0_valid;                                             // avalon_st_adapter_004:out_0_valid -> u_relay1_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_004_out_0_data;                                              // avalon_st_adapter_004:out_0_data -> u_relay1_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_004_out_0_ready;                                             // u_relay1_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_004:out_0_ready
	wire    [0:0] avalon_st_adapter_004_out_0_error;                                             // avalon_st_adapter_004:out_0_error -> u_relay1_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_valid;                // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:out_valid -> avalon_st_adapter_005:in_0_valid
	wire   [33:0] u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_data;                 // u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:out_data -> avalon_st_adapter_005:in_0_data
	wire          u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_ready;                // avalon_st_adapter_005:in_0_ready -> u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo:out_ready
	wire          avalon_st_adapter_005_out_0_valid;                                             // avalon_st_adapter_005:out_0_valid -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_005_out_0_data;                                              // avalon_st_adapter_005:out_0_data -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_005_out_0_ready;                                             // u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_005:out_0_ready
	wire    [0:0] avalon_st_adapter_005_out_0_error;                                             // avalon_st_adapter_005:out_0_error -> u_spi_filter_csr_avmm_bridge_0_avmm_agent:rdata_fifo_sink_error
	wire          u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                          // u_relay3_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_006:in_0_valid
	wire   [33:0] u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_data;                           // u_relay3_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_006:in_0_data
	wire          u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                          // avalon_st_adapter_006:in_0_ready -> u_relay3_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_006_out_0_valid;                                             // avalon_st_adapter_006:out_0_valid -> u_relay3_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_006_out_0_data;                                              // avalon_st_adapter_006:out_0_data -> u_relay3_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_006_out_0_ready;                                             // u_relay3_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_006:out_0_ready
	wire    [0:0] avalon_st_adapter_006_out_0_error;                                             // avalon_st_adapter_006:out_0_error -> u_relay3_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                         // u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_007:in_0_valid
	wire   [33:0] u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_data;                          // u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_007:in_0_data
	wire          u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                         // avalon_st_adapter_007:in_0_ready -> u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_007_out_0_valid;                                             // avalon_st_adapter_007:out_0_valid -> u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_007_out_0_data;                                              // avalon_st_adapter_007:out_0_data -> u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_007_out_0_ready;                                             // u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_007:out_0_ready
	wire    [0:0] avalon_st_adapter_007_out_0_error;                                             // avalon_st_adapter_007:out_0_error -> u_mailbox_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_valid;                        // u_rfnvram_smbus_master_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_008:in_0_valid
	wire   [33:0] u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_data;                         // u_rfnvram_smbus_master_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_008:in_0_data
	wire          u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_ready;                        // avalon_st_adapter_008:in_0_ready -> u_rfnvram_smbus_master_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_008_out_0_valid;                                             // avalon_st_adapter_008:out_0_valid -> u_rfnvram_smbus_master_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_008_out_0_data;                                              // avalon_st_adapter_008:out_0_data -> u_rfnvram_smbus_master_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_008_out_0_ready;                                             // u_rfnvram_smbus_master_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_008:out_0_ready
	wire    [0:0] avalon_st_adapter_008_out_0_error;                                             // avalon_st_adapter_008:out_0_error -> u_rfnvram_smbus_master_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_valid;                      // u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:out_valid -> avalon_st_adapter_009:in_0_valid
	wire   [33:0] u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_data;                       // u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:out_data -> avalon_st_adapter_009:in_0_data
	wire          u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_ready;                      // avalon_st_adapter_009:in_0_ready -> u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo:out_ready
	wire          avalon_st_adapter_009_out_0_valid;                                             // avalon_st_adapter_009:out_0_valid -> u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_009_out_0_data;                                              // avalon_st_adapter_009:out_0_data -> u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_009_out_0_ready;                                             // u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_009:out_0_ready
	wire    [0:0] avalon_st_adapter_009_out_0_error;                                             // avalon_st_adapter_009:out_0_error -> u_spi_filter_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                      // u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_010:in_0_valid
	wire   [33:0] u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_data;                       // u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_010:in_0_data
	wire          u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                      // avalon_st_adapter_010:in_0_ready -> u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_010_out_0_valid;                                             // avalon_st_adapter_010:out_0_valid -> u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_010_out_0_data;                                              // avalon_st_adapter_010:out_0_data -> u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_010_out_0_ready;                                             // u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_010:out_0_ready
	wire    [0:0] avalon_st_adapter_010_out_0_error;                                             // avalon_st_adapter_010:out_0_error -> u_timer_bank_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                      // u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_011:in_0_valid
	wire   [33:0] u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_data;                       // u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_011:in_0_data
	wire          u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                      // avalon_st_adapter_011:in_0_ready -> u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_011_out_0_valid;                                             // avalon_st_adapter_011:out_0_valid -> u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_011_out_0_data;                                              // avalon_st_adapter_011:out_0_data -> u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_011_out_0_ready;                                             // u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_011:out_0_ready
	wire    [0:0] avalon_st_adapter_011_out_0_error;                                             // avalon_st_adapter_011:out_0_error -> u_crypto_dma_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                          // u_crypto_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_012:in_0_valid
	wire   [33:0] u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_data;                           // u_crypto_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_012:in_0_data
	wire          u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                          // avalon_st_adapter_012:in_0_ready -> u_crypto_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_012_out_0_valid;                                             // avalon_st_adapter_012:out_0_valid -> u_crypto_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_012_out_0_data;                                              // avalon_st_adapter_012:out_0_data -> u_crypto_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_012_out_0_ready;                                             // u_crypto_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_012:out_0_ready
	wire    [0:0] avalon_st_adapter_012_out_0_error;                                             // avalon_st_adapter_012:out_0_error -> u_crypto_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid;               // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_013:in_0_valid
	wire   [33:0] u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_data;                // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_013:in_0_data
	wire          u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready;               // avalon_st_adapter_013:in_0_ready -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_013_out_0_valid;                                             // avalon_st_adapter_013:out_0_valid -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_013_out_0_data;                                              // avalon_st_adapter_013:out_0_data -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_013_out_0_ready;                                             // u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_013:out_0_ready
	wire    [0:0] avalon_st_adapter_013_out_0_error;                                             // avalon_st_adapter_013:out_0_error -> u_spi_filter_bmc_we_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid;       // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_014:in_0_valid
	wire   [33:0] u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data;        // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_014:in_0_data
	wire          u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready;       // avalon_st_adapter_014:in_0_ready -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_014_out_0_valid;                                             // avalon_st_adapter_014:out_0_valid -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_014_out_0_data;                                              // avalon_st_adapter_014:out_0_data -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_014_out_0_ready;                                             // u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_014:out_0_ready
	wire    [0:0] avalon_st_adapter_014_out_0_error;                                             // avalon_st_adapter_014:out_0_error -> u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_valid;                             // u_i3c_avmm_bridge_avmm_agent_rdata_fifo:out_valid -> avalon_st_adapter_015:in_0_valid
	wire   [33:0] u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_data;                              // u_i3c_avmm_bridge_avmm_agent_rdata_fifo:out_data -> avalon_st_adapter_015:in_0_data
	wire          u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_ready;                             // avalon_st_adapter_015:in_0_ready -> u_i3c_avmm_bridge_avmm_agent_rdata_fifo:out_ready
	wire          avalon_st_adapter_015_out_0_valid;                                             // avalon_st_adapter_015:out_0_valid -> u_i3c_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_015_out_0_data;                                              // avalon_st_adapter_015:out_0_data -> u_i3c_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_015_out_0_ready;                                             // u_i3c_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_015:out_0_ready
	wire    [0:0] avalon_st_adapter_015_out_0_error;                                             // avalon_st_adapter_015:out_0_error -> u_i3c_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid;       // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_016:in_0_valid
	wire   [33:0] u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data;        // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_016:in_0_data
	wire          u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready;       // avalon_st_adapter_016:in_0_ready -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_016_out_0_valid;                                             // avalon_st_adapter_016:out_0_valid -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_016_out_0_data;                                              // avalon_st_adapter_016:out_0_data -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_016_out_0_ready;                                             // u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_016:out_0_ready
	wire    [0:0] avalon_st_adapter_016_out_0_error;                                             // avalon_st_adapter_016:out_0_error -> u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid;       // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_017:in_0_valid
	wire   [33:0] u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data;        // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_017:in_0_data
	wire          u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready;       // avalon_st_adapter_017:in_0_ready -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_017_out_0_valid;                                             // avalon_st_adapter_017:out_0_valid -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_017_out_0_data;                                              // avalon_st_adapter_017:out_0_data -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_017_out_0_ready;                                             // u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_017:out_0_ready
	wire    [0:0] avalon_st_adapter_017_out_0_error;                                             // avalon_st_adapter_017:out_0_error -> u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid;       // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_018:in_0_valid
	wire   [33:0] u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data;        // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_018:in_0_data
	wire          u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready;       // avalon_st_adapter_018:in_0_ready -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_018_out_0_valid;                                             // avalon_st_adapter_018:out_0_valid -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_018_out_0_data;                                              // avalon_st_adapter_018:out_0_data -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_018_out_0_ready;                                             // u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_018:out_0_ready
	wire    [0:0] avalon_st_adapter_018_out_0_error;                                             // avalon_st_adapter_018:out_0_error -> u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                          // u_relay2_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_019:in_0_valid
	wire   [33:0] u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_data;                           // u_relay2_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_019:in_0_data
	wire          u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                          // avalon_st_adapter_019:in_0_ready -> u_relay2_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_019_out_0_valid;                                             // avalon_st_adapter_019:out_0_valid -> u_relay2_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_019_out_0_data;                                              // avalon_st_adapter_019:out_0_data -> u_relay2_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_019_out_0_ready;                                             // u_relay2_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_019:out_0_ready
	wire    [0:0] avalon_st_adapter_019_out_0_error;                                             // avalon_st_adapter_019:out_0_error -> u_relay2_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_valid;                             // u_aes_avmm_bridge_avmm_agent:rdata_fifo_src_valid -> avalon_st_adapter_020:in_0_valid
	wire   [33:0] u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_data;                              // u_aes_avmm_bridge_avmm_agent:rdata_fifo_src_data -> avalon_st_adapter_020:in_0_data
	wire          u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_ready;                             // avalon_st_adapter_020:in_0_ready -> u_aes_avmm_bridge_avmm_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_020_out_0_valid;                                             // avalon_st_adapter_020:out_0_valid -> u_aes_avmm_bridge_avmm_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_020_out_0_data;                                              // avalon_st_adapter_020:out_0_data -> u_aes_avmm_bridge_avmm_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_020_out_0_ready;                                             // u_aes_avmm_bridge_avmm_agent:rdata_fifo_sink_ready -> avalon_st_adapter_020:out_0_ready
	wire    [0:0] avalon_st_adapter_020_out_0_error;                                             // avalon_st_adapter_020:out_0_error -> u_aes_avmm_bridge_avmm_agent:rdata_fifo_sink_error
	wire          u_ufm_csr_agent_rdata_fifo_src_valid;                                          // u_ufm_csr_agent:rdata_fifo_src_valid -> avalon_st_adapter_021:in_0_valid
	wire   [33:0] u_ufm_csr_agent_rdata_fifo_src_data;                                           // u_ufm_csr_agent:rdata_fifo_src_data -> avalon_st_adapter_021:in_0_data
	wire          u_ufm_csr_agent_rdata_fifo_src_ready;                                          // avalon_st_adapter_021:in_0_ready -> u_ufm_csr_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_021_out_0_valid;                                             // avalon_st_adapter_021:out_0_valid -> u_ufm_csr_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_021_out_0_data;                                              // avalon_st_adapter_021:out_0_data -> u_ufm_csr_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_021_out_0_ready;                                             // u_ufm_csr_agent:rdata_fifo_sink_ready -> avalon_st_adapter_021:out_0_ready
	wire    [0:0] avalon_st_adapter_021_out_0_error;                                             // avalon_st_adapter_021:out_0_error -> u_ufm_csr_agent:rdata_fifo_sink_error
	wire          u_global_state_reg_s1_agent_rdata_fifo_src_valid;                              // u_global_state_reg_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_022:in_0_valid
	wire   [33:0] u_global_state_reg_s1_agent_rdata_fifo_src_data;                               // u_global_state_reg_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_022:in_0_data
	wire          u_global_state_reg_s1_agent_rdata_fifo_src_ready;                              // avalon_st_adapter_022:in_0_ready -> u_global_state_reg_s1_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_022_out_0_valid;                                             // avalon_st_adapter_022:out_0_valid -> u_global_state_reg_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_022_out_0_data;                                              // avalon_st_adapter_022:out_0_data -> u_global_state_reg_s1_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_022_out_0_ready;                                             // u_global_state_reg_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_022:out_0_ready
	wire    [0:0] avalon_st_adapter_022_out_0_error;                                             // avalon_st_adapter_022:out_0_error -> u_global_state_reg_s1_agent:rdata_fifo_sink_error
	wire          u_gpo_1_s1_agent_rdata_fifo_src_valid;                                         // u_gpo_1_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_023:in_0_valid
	wire   [33:0] u_gpo_1_s1_agent_rdata_fifo_src_data;                                          // u_gpo_1_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_023:in_0_data
	wire          u_gpo_1_s1_agent_rdata_fifo_src_ready;                                         // avalon_st_adapter_023:in_0_ready -> u_gpo_1_s1_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_023_out_0_valid;                                             // avalon_st_adapter_023:out_0_valid -> u_gpo_1_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_023_out_0_data;                                              // avalon_st_adapter_023:out_0_data -> u_gpo_1_s1_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_023_out_0_ready;                                             // u_gpo_1_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_023:out_0_ready
	wire    [0:0] avalon_st_adapter_023_out_0_error;                                             // avalon_st_adapter_023:out_0_error -> u_gpo_1_s1_agent:rdata_fifo_sink_error
	wire          u_gpi_1_s1_agent_rdata_fifo_src_valid;                                         // u_gpi_1_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_024:in_0_valid
	wire   [33:0] u_gpi_1_s1_agent_rdata_fifo_src_data;                                          // u_gpi_1_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_024:in_0_data
	wire          u_gpi_1_s1_agent_rdata_fifo_src_ready;                                         // avalon_st_adapter_024:in_0_ready -> u_gpi_1_s1_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_024_out_0_valid;                                             // avalon_st_adapter_024:out_0_valid -> u_gpi_1_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_024_out_0_data;                                              // avalon_st_adapter_024:out_0_data -> u_gpi_1_s1_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_024_out_0_ready;                                             // u_gpi_1_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_024:out_0_ready
	wire    [0:0] avalon_st_adapter_024_out_0_error;                                             // avalon_st_adapter_024:out_0_error -> u_gpi_1_s1_agent:rdata_fifo_sink_error
	wire          u_gpo_2_s1_agent_rdata_fifo_src_valid;                                         // u_gpo_2_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_025:in_0_valid
	wire   [33:0] u_gpo_2_s1_agent_rdata_fifo_src_data;                                          // u_gpo_2_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_025:in_0_data
	wire          u_gpo_2_s1_agent_rdata_fifo_src_ready;                                         // avalon_st_adapter_025:in_0_ready -> u_gpo_2_s1_agent:rdata_fifo_src_ready
	wire          avalon_st_adapter_025_out_0_valid;                                             // avalon_st_adapter_025:out_0_valid -> u_gpo_2_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] avalon_st_adapter_025_out_0_data;                                              // avalon_st_adapter_025:out_0_data -> u_gpo_2_s1_agent:rdata_fifo_sink_data
	wire          avalon_st_adapter_025_out_0_ready;                                             // u_gpo_2_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_025:out_0_ready
	wire    [0:0] avalon_st_adapter_025_out_0_error;                                             // avalon_st_adapter_025:out_0_error -> u_gpo_2_s1_agent:rdata_fifo_sink_error

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (21),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (6),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (32),
		.UAV_BURSTCOUNT_W            (8),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (1),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (0),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (1),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0)
	) dma_ufm_avmm_bridge_0_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                                         //                       clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       //                     reset.reset
		.uav_address            (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount         (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read               (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write              (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest        (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid      (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable         (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata           (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata          (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock               (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess        (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address             (dma_ufm_avmm_bridge_0_avmm_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest         (dma_ufm_avmm_bridge_0_avmm_waitrequest),                                        //                          .waitrequest
		.av_burstcount          (dma_ufm_avmm_bridge_0_avmm_burstcount),                                         //                          .burstcount
		.av_read                (dma_ufm_avmm_bridge_0_avmm_read),                                               //                          .read
		.av_readdata            (dma_ufm_avmm_bridge_0_avmm_readdata),                                           //                          .readdata
		.av_readdatavalid       (dma_ufm_avmm_bridge_0_avmm_readdatavalid),                                      //                          .readdatavalid
		.av_write               (dma_ufm_avmm_bridge_0_avmm_write),                                              //                          .write
		.av_writedata           (dma_ufm_avmm_bridge_0_avmm_writedata),                                          //                          .writedata
		.av_byteenable          (4'b1111),                                                                       //               (terminated)
		.av_beginbursttransfer  (1'b0),                                                                          //               (terminated)
		.av_begintransfer       (1'b0),                                                                          //               (terminated)
		.av_chipselect          (1'b0),                                                                          //               (terminated)
		.av_lock                (1'b0),                                                                          //               (terminated)
		.av_debugaccess         (1'b0),                                                                          //               (terminated)
		.uav_clken              (),                                                                              //               (terminated)
		.av_clken               (1'b1),                                                                          //               (terminated)
		.uav_response           (2'b00),                                                                         //               (terminated)
		.av_response            (),                                                                              //               (terminated)
		.uav_writeresponsevalid (1'b0),                                                                          //               (terminated)
		.av_writeresponsevalid  ()                                                                               //               (terminated)
	);

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (32),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (32),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (0),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (1)
	) u_nios_data_master_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                                 //                       clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),               //                     reset.reset
		.uav_address            (u_nios_data_master_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount         (u_nios_data_master_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read               (u_nios_data_master_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write              (u_nios_data_master_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest        (u_nios_data_master_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid      (u_nios_data_master_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable         (u_nios_data_master_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata           (u_nios_data_master_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata          (u_nios_data_master_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock               (u_nios_data_master_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess        (u_nios_data_master_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address             (u_nios_data_master_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest         (u_nios_data_master_waitrequest),                                        //                          .waitrequest
		.av_byteenable          (u_nios_data_master_byteenable),                                         //                          .byteenable
		.av_read                (u_nios_data_master_read),                                               //                          .read
		.av_readdata            (u_nios_data_master_readdata),                                           //                          .readdata
		.av_write               (u_nios_data_master_write),                                              //                          .write
		.av_writedata           (u_nios_data_master_writedata),                                          //                          .writedata
		.av_debugaccess         (u_nios_data_master_debugaccess),                                        //                          .debugaccess
		.av_burstcount          (1'b1),                                                                  //               (terminated)
		.av_beginbursttransfer  (1'b0),                                                                  //               (terminated)
		.av_begintransfer       (1'b0),                                                                  //               (terminated)
		.av_chipselect          (1'b0),                                                                  //               (terminated)
		.av_readdatavalid       (),                                                                      //               (terminated)
		.av_lock                (1'b0),                                                                  //               (terminated)
		.uav_clken              (),                                                                      //               (terminated)
		.av_clken               (1'b1),                                                                  //               (terminated)
		.uav_response           (2'b00),                                                                 //               (terminated)
		.av_response            (),                                                                      //               (terminated)
		.uav_writeresponsevalid (1'b0),                                                                  //               (terminated)
		.av_writeresponsevalid  ()                                                                       //               (terminated)
	);

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (23),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (32),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (0),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (0),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (1),
		.AV_REGISTERINCOMINGSIGNALS  (0)
	) u_nios_instruction_master_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                                        //                       clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                      //                     reset.reset
		.uav_address            (u_nios_instruction_master_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount         (u_nios_instruction_master_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read               (u_nios_instruction_master_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write              (u_nios_instruction_master_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest        (u_nios_instruction_master_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid      (u_nios_instruction_master_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable         (u_nios_instruction_master_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata           (u_nios_instruction_master_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata          (u_nios_instruction_master_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock               (u_nios_instruction_master_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess        (u_nios_instruction_master_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address             (u_nios_instruction_master_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest         (u_nios_instruction_master_waitrequest),                                        //                          .waitrequest
		.av_read                (u_nios_instruction_master_read),                                               //                          .read
		.av_readdata            (u_nios_instruction_master_readdata),                                           //                          .readdata
		.av_burstcount          (1'b1),                                                                         //               (terminated)
		.av_byteenable          (4'b1111),                                                                      //               (terminated)
		.av_beginbursttransfer  (1'b0),                                                                         //               (terminated)
		.av_begintransfer       (1'b0),                                                                         //               (terminated)
		.av_chipselect          (1'b0),                                                                         //               (terminated)
		.av_readdatavalid       (),                                                                             //               (terminated)
		.av_write               (1'b0),                                                                         //               (terminated)
		.av_writedata           (32'b00000000000000000000000000000000),                                         //               (terminated)
		.av_lock                (1'b0),                                                                         //               (terminated)
		.av_debugaccess         (1'b0),                                                                         //               (terminated)
		.uav_clken              (),                                                                             //               (terminated)
		.av_clken               (1'b1),                                                                         //               (terminated)
		.uav_response           (2'b00),                                                                        //               (terminated)
		.av_response            (),                                                                             //               (terminated)
		.uav_writeresponsevalid (1'b0),                                                                         //               (terminated)
		.av_writeresponsevalid  ()                                                                              //               (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (19),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (2),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (4),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_ufm_data_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_ufm_data_agent_m0_address),                             // avalon_universal_slave_0.address
		.uav_burstcount         (u_ufm_data_agent_m0_burstcount),                          //                         .burstcount
		.uav_read               (u_ufm_data_agent_m0_read),                                //                         .read
		.uav_write              (u_ufm_data_agent_m0_write),                               //                         .write
		.uav_waitrequest        (u_ufm_data_agent_m0_waitrequest),                         //                         .waitrequest
		.uav_readdatavalid      (u_ufm_data_agent_m0_readdatavalid),                       //                         .readdatavalid
		.uav_byteenable         (u_ufm_data_agent_m0_byteenable),                          //                         .byteenable
		.uav_readdata           (u_ufm_data_agent_m0_readdata),                            //                         .readdata
		.uav_writedata          (u_ufm_data_agent_m0_writedata),                           //                         .writedata
		.uav_lock               (u_ufm_data_agent_m0_lock),                                //                         .lock
		.uav_debugaccess        (u_ufm_data_agent_m0_debugaccess),                         //                         .debugaccess
		.av_address             (u_ufm_data_address),                                      //      avalon_anti_slave_0.address
		.av_write               (u_ufm_data_write),                                        //                         .write
		.av_read                (u_ufm_data_read),                                         //                         .read
		.av_readdata            (u_ufm_data_readdata),                                     //                         .readdata
		.av_writedata           (u_ufm_data_writedata),                                    //                         .writedata
		.av_burstcount          (u_ufm_data_burstcount),                                   //                         .burstcount
		.av_readdatavalid       (u_ufm_data_readdatavalid),                                //                         .readdatavalid
		.av_waitrequest         (u_ufm_data_waitrequest),                                  //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (9),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_nios_debug_mem_slave_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_nios_debug_mem_slave_agent_m0_address),                 // avalon_universal_slave_0.address
		.uav_burstcount         (u_nios_debug_mem_slave_agent_m0_burstcount),              //                         .burstcount
		.uav_read               (u_nios_debug_mem_slave_agent_m0_read),                    //                         .read
		.uav_write              (u_nios_debug_mem_slave_agent_m0_write),                   //                         .write
		.uav_waitrequest        (u_nios_debug_mem_slave_agent_m0_waitrequest),             //                         .waitrequest
		.uav_readdatavalid      (u_nios_debug_mem_slave_agent_m0_readdatavalid),           //                         .readdatavalid
		.uav_byteenable         (u_nios_debug_mem_slave_agent_m0_byteenable),              //                         .byteenable
		.uav_readdata           (u_nios_debug_mem_slave_agent_m0_readdata),                //                         .readdata
		.uav_writedata          (u_nios_debug_mem_slave_agent_m0_writedata),               //                         .writedata
		.uav_lock               (u_nios_debug_mem_slave_agent_m0_lock),                    //                         .lock
		.uav_debugaccess        (u_nios_debug_mem_slave_agent_m0_debugaccess),             //                         .debugaccess
		.av_address             (u_nios_debug_mem_slave_address),                          //      avalon_anti_slave_0.address
		.av_write               (u_nios_debug_mem_slave_write),                            //                         .write
		.av_read                (u_nios_debug_mem_slave_read),                             //                         .read
		.av_readdata            (u_nios_debug_mem_slave_readdata),                         //                         .readdata
		.av_writedata           (u_nios_debug_mem_slave_writedata),                        //                         .writedata
		.av_byteenable          (u_nios_debug_mem_slave_byteenable),                       //                         .byteenable
		.av_waitrequest         (u_nios_debug_mem_slave_waitrequest),                      //                         .waitrequest
		.av_debugaccess         (u_nios_debug_mem_slave_debugaccess),                      //                         .debugaccess
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (15),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (1),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_nios_ram_s1_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_nios_ram_s1_agent_m0_address),                          // avalon_universal_slave_0.address
		.uav_burstcount         (u_nios_ram_s1_agent_m0_burstcount),                       //                         .burstcount
		.uav_read               (u_nios_ram_s1_agent_m0_read),                             //                         .read
		.uav_write              (u_nios_ram_s1_agent_m0_write),                            //                         .write
		.uav_waitrequest        (u_nios_ram_s1_agent_m0_waitrequest),                      //                         .waitrequest
		.uav_readdatavalid      (u_nios_ram_s1_agent_m0_readdatavalid),                    //                         .readdatavalid
		.uav_byteenable         (u_nios_ram_s1_agent_m0_byteenable),                       //                         .byteenable
		.uav_readdata           (u_nios_ram_s1_agent_m0_readdata),                         //                         .readdata
		.uav_writedata          (u_nios_ram_s1_agent_m0_writedata),                        //                         .writedata
		.uav_lock               (u_nios_ram_s1_agent_m0_lock),                             //                         .lock
		.uav_debugaccess        (u_nios_ram_s1_agent_m0_debugaccess),                      //                         .debugaccess
		.av_address             (u_nios_ram_s1_address),                                   //      avalon_anti_slave_0.address
		.av_write               (u_nios_ram_s1_write),                                     //                         .write
		.av_readdata            (u_nios_ram_s1_readdata),                                  //                         .readdata
		.av_writedata           (u_nios_ram_s1_writedata),                                 //                         .writedata
		.av_byteenable          (u_nios_ram_s1_byteenable),                                //                         .byteenable
		.av_chipselect          (u_nios_ram_s1_chipselect),                                //                         .chipselect
		.av_clken               (u_nios_ram_s1_clken),                                     //                         .clken
		.av_read                (),                                                        //              (terminated)
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (3),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_dual_config_avalon_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_dual_config_avalon_agent_m0_address),                   // avalon_universal_slave_0.address
		.uav_burstcount         (u_dual_config_avalon_agent_m0_burstcount),                //                         .burstcount
		.uav_read               (u_dual_config_avalon_agent_m0_read),                      //                         .read
		.uav_write              (u_dual_config_avalon_agent_m0_write),                     //                         .write
		.uav_waitrequest        (u_dual_config_avalon_agent_m0_waitrequest),               //                         .waitrequest
		.uav_readdatavalid      (u_dual_config_avalon_agent_m0_readdatavalid),             //                         .readdatavalid
		.uav_byteenable         (u_dual_config_avalon_agent_m0_byteenable),                //                         .byteenable
		.uav_readdata           (u_dual_config_avalon_agent_m0_readdata),                  //                         .readdata
		.uav_writedata          (u_dual_config_avalon_agent_m0_writedata),                 //                         .writedata
		.uav_lock               (u_dual_config_avalon_agent_m0_lock),                      //                         .lock
		.uav_debugaccess        (u_dual_config_avalon_agent_m0_debugaccess),               //                         .debugaccess
		.av_address             (u_dual_config_avalon_address),                            //      avalon_anti_slave_0.address
		.av_write               (u_dual_config_avalon_write),                              //                         .write
		.av_read                (u_dual_config_avalon_read),                               //                         .read
		.av_readdata            (u_dual_config_avalon_readdata),                           //                         .readdata
		.av_writedata           (u_dual_config_avalon_writedata),                          //                         .writedata
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_relay1_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_relay1_avmm_bridge_avmm_agent_m0_address),              // avalon_universal_slave_0.address
		.uav_burstcount         (u_relay1_avmm_bridge_avmm_agent_m0_burstcount),           //                         .burstcount
		.uav_read               (u_relay1_avmm_bridge_avmm_agent_m0_read),                 //                         .read
		.uav_write              (u_relay1_avmm_bridge_avmm_agent_m0_write),                //                         .write
		.uav_waitrequest        (u_relay1_avmm_bridge_avmm_agent_m0_waitrequest),          //                         .waitrequest
		.uav_readdatavalid      (u_relay1_avmm_bridge_avmm_agent_m0_readdatavalid),        //                         .readdatavalid
		.uav_byteenable         (u_relay1_avmm_bridge_avmm_agent_m0_byteenable),           //                         .byteenable
		.uav_readdata           (u_relay1_avmm_bridge_avmm_agent_m0_readdata),             //                         .readdata
		.uav_writedata          (u_relay1_avmm_bridge_avmm_agent_m0_writedata),            //                         .writedata
		.uav_lock               (u_relay1_avmm_bridge_avmm_agent_m0_lock),                 //                         .lock
		.uav_debugaccess        (u_relay1_avmm_bridge_avmm_agent_m0_debugaccess),          //                         .debugaccess
		.av_address             (u_relay1_avmm_bridge_avmm_address),                       //      avalon_anti_slave_0.address
		.av_write               (u_relay1_avmm_bridge_avmm_write),                         //                         .write
		.av_read                (u_relay1_avmm_bridge_avmm_read),                          //                         .read
		.av_readdata            (u_relay1_avmm_bridge_avmm_readdata),                      //                         .readdata
		.av_writedata           (u_relay1_avmm_bridge_avmm_writedata),                     //                         .writedata
		.av_waitrequest         (u_relay1_avmm_bridge_avmm_waitrequest),                   //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (6),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_csr_avmm_bridge_0_avmm_translator (
		.clk                    (u_spi_clk_out_clk_clk),                                            //                      clk.clk
		.reset                  (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_address),             // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_burstcount),          //                         .burstcount
		.uav_read               (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_read),                //                         .read
		.uav_write              (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_write),               //                         .write
		.uav_waitrequest        (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_waitrequest),         //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdatavalid),       //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_byteenable),          //                         .byteenable
		.uav_readdata           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdata),            //                         .readdata
		.uav_writedata          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_writedata),           //                         .writedata
		.uav_lock               (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_lock),                //                         .lock
		.uav_debugaccess        (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_debugaccess),         //                         .debugaccess
		.av_address             (u_spi_filter_csr_avmm_bridge_0_avmm_address),                      //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_csr_avmm_bridge_0_avmm_write),                        //                         .write
		.av_read                (u_spi_filter_csr_avmm_bridge_0_avmm_read),                         //                         .read
		.av_readdata            (u_spi_filter_csr_avmm_bridge_0_avmm_readdata),                     //                         .readdata
		.av_writedata           (u_spi_filter_csr_avmm_bridge_0_avmm_writedata),                    //                         .writedata
		.av_readdatavalid       (u_spi_filter_csr_avmm_bridge_0_avmm_readdatavalid),                //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_csr_avmm_bridge_0_avmm_waitrequest),                  //                         .waitrequest
		.av_begintransfer       (),                                                                 //              (terminated)
		.av_beginbursttransfer  (),                                                                 //              (terminated)
		.av_burstcount          (),                                                                 //              (terminated)
		.av_byteenable          (),                                                                 //              (terminated)
		.av_writebyteenable     (),                                                                 //              (terminated)
		.av_lock                (),                                                                 //              (terminated)
		.av_chipselect          (),                                                                 //              (terminated)
		.av_clken               (),                                                                 //              (terminated)
		.uav_clken              (1'b0),                                                             //              (terminated)
		.av_debugaccess         (),                                                                 //              (terminated)
		.av_outputenable        (),                                                                 //              (terminated)
		.uav_response           (),                                                                 //              (terminated)
		.av_response            (2'b00),                                                            //              (terminated)
		.uav_writeresponsevalid (),                                                                 //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                              //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_relay3_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_relay3_avmm_bridge_avmm_agent_m0_address),              // avalon_universal_slave_0.address
		.uav_burstcount         (u_relay3_avmm_bridge_avmm_agent_m0_burstcount),           //                         .burstcount
		.uav_read               (u_relay3_avmm_bridge_avmm_agent_m0_read),                 //                         .read
		.uav_write              (u_relay3_avmm_bridge_avmm_agent_m0_write),                //                         .write
		.uav_waitrequest        (u_relay3_avmm_bridge_avmm_agent_m0_waitrequest),          //                         .waitrequest
		.uav_readdatavalid      (u_relay3_avmm_bridge_avmm_agent_m0_readdatavalid),        //                         .readdatavalid
		.uav_byteenable         (u_relay3_avmm_bridge_avmm_agent_m0_byteenable),           //                         .byteenable
		.uav_readdata           (u_relay3_avmm_bridge_avmm_agent_m0_readdata),             //                         .readdata
		.uav_writedata          (u_relay3_avmm_bridge_avmm_agent_m0_writedata),            //                         .writedata
		.uav_lock               (u_relay3_avmm_bridge_avmm_agent_m0_lock),                 //                         .lock
		.uav_debugaccess        (u_relay3_avmm_bridge_avmm_agent_m0_debugaccess),          //                         .debugaccess
		.av_address             (u_relay3_avmm_bridge_avmm_address),                       //      avalon_anti_slave_0.address
		.av_write               (u_relay3_avmm_bridge_avmm_write),                         //                         .write
		.av_read                (u_relay3_avmm_bridge_avmm_read),                          //                         .read
		.av_readdata            (u_relay3_avmm_bridge_avmm_readdata),                      //                         .readdata
		.av_writedata           (u_relay3_avmm_bridge_avmm_writedata),                     //                         .writedata
		.av_waitrequest         (u_relay3_avmm_bridge_avmm_waitrequest),                   //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_mailbox_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_mailbox_avmm_bridge_avmm_agent_m0_address),             // avalon_universal_slave_0.address
		.uav_burstcount         (u_mailbox_avmm_bridge_avmm_agent_m0_burstcount),          //                         .burstcount
		.uav_read               (u_mailbox_avmm_bridge_avmm_agent_m0_read),                //                         .read
		.uav_write              (u_mailbox_avmm_bridge_avmm_agent_m0_write),               //                         .write
		.uav_waitrequest        (u_mailbox_avmm_bridge_avmm_agent_m0_waitrequest),         //                         .waitrequest
		.uav_readdatavalid      (u_mailbox_avmm_bridge_avmm_agent_m0_readdatavalid),       //                         .readdatavalid
		.uav_byteenable         (u_mailbox_avmm_bridge_avmm_agent_m0_byteenable),          //                         .byteenable
		.uav_readdata           (u_mailbox_avmm_bridge_avmm_agent_m0_readdata),            //                         .readdata
		.uav_writedata          (u_mailbox_avmm_bridge_avmm_agent_m0_writedata),           //                         .writedata
		.uav_lock               (u_mailbox_avmm_bridge_avmm_agent_m0_lock),                //                         .lock
		.uav_debugaccess        (u_mailbox_avmm_bridge_avmm_agent_m0_debugaccess),         //                         .debugaccess
		.av_address             (u_mailbox_avmm_bridge_avmm_address),                      //      avalon_anti_slave_0.address
		.av_write               (u_mailbox_avmm_bridge_avmm_write),                        //                         .write
		.av_read                (u_mailbox_avmm_bridge_avmm_read),                         //                         .read
		.av_readdata            (u_mailbox_avmm_bridge_avmm_readdata),                     //                         .readdata
		.av_writedata           (u_mailbox_avmm_bridge_avmm_writedata),                    //                         .writedata
		.av_readdatavalid       (u_mailbox_avmm_bridge_avmm_readdatavalid),                //                         .readdatavalid
		.av_waitrequest         (u_mailbox_avmm_bridge_avmm_waitrequest),                  //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (4),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_rfnvram_smbus_master_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_rfnvram_smbus_master_avmm_agent_m0_address),            // avalon_universal_slave_0.address
		.uav_burstcount         (u_rfnvram_smbus_master_avmm_agent_m0_burstcount),         //                         .burstcount
		.uav_read               (u_rfnvram_smbus_master_avmm_agent_m0_read),               //                         .read
		.uav_write              (u_rfnvram_smbus_master_avmm_agent_m0_write),              //                         .write
		.uav_waitrequest        (u_rfnvram_smbus_master_avmm_agent_m0_waitrequest),        //                         .waitrequest
		.uav_readdatavalid      (u_rfnvram_smbus_master_avmm_agent_m0_readdatavalid),      //                         .readdatavalid
		.uav_byteenable         (u_rfnvram_smbus_master_avmm_agent_m0_byteenable),         //                         .byteenable
		.uav_readdata           (u_rfnvram_smbus_master_avmm_agent_m0_readdata),           //                         .readdata
		.uav_writedata          (u_rfnvram_smbus_master_avmm_agent_m0_writedata),          //                         .writedata
		.uav_lock               (u_rfnvram_smbus_master_avmm_agent_m0_lock),               //                         .lock
		.uav_debugaccess        (u_rfnvram_smbus_master_avmm_agent_m0_debugaccess),        //                         .debugaccess
		.av_address             (u_rfnvram_smbus_master_avmm_address),                     //      avalon_anti_slave_0.address
		.av_write               (u_rfnvram_smbus_master_avmm_write),                       //                         .write
		.av_read                (u_rfnvram_smbus_master_avmm_read),                        //                         .read
		.av_readdata            (u_rfnvram_smbus_master_avmm_readdata),                    //                         .readdata
		.av_writedata           (u_rfnvram_smbus_master_avmm_writedata),                   //                         .writedata
		.av_readdatavalid       (u_rfnvram_smbus_master_avmm_readdatavalid),               //                         .readdatavalid
		.av_waitrequest         (u_rfnvram_smbus_master_avmm_waitrequest),                 //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (25),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_avmm_bridge_avmm_translator (
		.clk                    (u_spi_clk_out_clk_clk),                                            //                      clk.clk
		.reset                  (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_spi_filter_avmm_bridge_avmm_agent_m0_address),                   // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_avmm_bridge_avmm_agent_m0_burstcount),                //                         .burstcount
		.uav_read               (u_spi_filter_avmm_bridge_avmm_agent_m0_read),                      //                         .read
		.uav_write              (u_spi_filter_avmm_bridge_avmm_agent_m0_write),                     //                         .write
		.uav_waitrequest        (u_spi_filter_avmm_bridge_avmm_agent_m0_waitrequest),               //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_avmm_bridge_avmm_agent_m0_readdatavalid),             //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_avmm_bridge_avmm_agent_m0_byteenable),                //                         .byteenable
		.uav_readdata           (u_spi_filter_avmm_bridge_avmm_agent_m0_readdata),                  //                         .readdata
		.uav_writedata          (u_spi_filter_avmm_bridge_avmm_agent_m0_writedata),                 //                         .writedata
		.uav_lock               (u_spi_filter_avmm_bridge_avmm_agent_m0_lock),                      //                         .lock
		.uav_debugaccess        (u_spi_filter_avmm_bridge_avmm_agent_m0_debugaccess),               //                         .debugaccess
		.av_address             (u_spi_filter_avmm_bridge_avmm_address),                            //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_avmm_bridge_avmm_write),                              //                         .write
		.av_read                (u_spi_filter_avmm_bridge_avmm_read),                               //                         .read
		.av_readdata            (u_spi_filter_avmm_bridge_avmm_readdata),                           //                         .readdata
		.av_writedata           (u_spi_filter_avmm_bridge_avmm_writedata),                          //                         .writedata
		.av_readdatavalid       (u_spi_filter_avmm_bridge_avmm_readdatavalid),                      //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_avmm_bridge_avmm_waitrequest),                        //                         .waitrequest
		.av_begintransfer       (),                                                                 //              (terminated)
		.av_beginbursttransfer  (),                                                                 //              (terminated)
		.av_burstcount          (),                                                                 //              (terminated)
		.av_byteenable          (),                                                                 //              (terminated)
		.av_writebyteenable     (),                                                                 //              (terminated)
		.av_lock                (),                                                                 //              (terminated)
		.av_chipselect          (),                                                                 //              (terminated)
		.av_clken               (),                                                                 //              (terminated)
		.uav_clken              (1'b0),                                                             //              (terminated)
		.av_debugaccess         (),                                                                 //              (terminated)
		.av_outputenable        (),                                                                 //              (terminated)
		.uav_response           (),                                                                 //              (terminated)
		.av_response            (2'b00),                                                            //              (terminated)
		.uav_writeresponsevalid (),                                                                 //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                              //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (11),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_timer_bank_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_timer_bank_avmm_bridge_avmm_agent_m0_address),          // avalon_universal_slave_0.address
		.uav_burstcount         (u_timer_bank_avmm_bridge_avmm_agent_m0_burstcount),       //                         .burstcount
		.uav_read               (u_timer_bank_avmm_bridge_avmm_agent_m0_read),             //                         .read
		.uav_write              (u_timer_bank_avmm_bridge_avmm_agent_m0_write),            //                         .write
		.uav_waitrequest        (u_timer_bank_avmm_bridge_avmm_agent_m0_waitrequest),      //                         .waitrequest
		.uav_readdatavalid      (u_timer_bank_avmm_bridge_avmm_agent_m0_readdatavalid),    //                         .readdatavalid
		.uav_byteenable         (u_timer_bank_avmm_bridge_avmm_agent_m0_byteenable),       //                         .byteenable
		.uav_readdata           (u_timer_bank_avmm_bridge_avmm_agent_m0_readdata),         //                         .readdata
		.uav_writedata          (u_timer_bank_avmm_bridge_avmm_agent_m0_writedata),        //                         .writedata
		.uav_lock               (u_timer_bank_avmm_bridge_avmm_agent_m0_lock),             //                         .lock
		.uav_debugaccess        (u_timer_bank_avmm_bridge_avmm_agent_m0_debugaccess),      //                         .debugaccess
		.av_address             (u_timer_bank_avmm_bridge_avmm_address),                   //      avalon_anti_slave_0.address
		.av_write               (u_timer_bank_avmm_bridge_avmm_write),                     //                         .write
		.av_read                (u_timer_bank_avmm_bridge_avmm_read),                      //                         .read
		.av_readdata            (u_timer_bank_avmm_bridge_avmm_readdata),                  //                         .readdata
		.av_writedata           (u_timer_bank_avmm_bridge_avmm_writedata),                 //                         .writedata
		.av_waitrequest         (u_timer_bank_avmm_bridge_avmm_waitrequest),               //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_crypto_dma_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_crypto_dma_avmm_bridge_avmm_agent_m0_address),          // avalon_universal_slave_0.address
		.uav_burstcount         (u_crypto_dma_avmm_bridge_avmm_agent_m0_burstcount),       //                         .burstcount
		.uav_read               (u_crypto_dma_avmm_bridge_avmm_agent_m0_read),             //                         .read
		.uav_write              (u_crypto_dma_avmm_bridge_avmm_agent_m0_write),            //                         .write
		.uav_waitrequest        (u_crypto_dma_avmm_bridge_avmm_agent_m0_waitrequest),      //                         .waitrequest
		.uav_readdatavalid      (u_crypto_dma_avmm_bridge_avmm_agent_m0_readdatavalid),    //                         .readdatavalid
		.uav_byteenable         (u_crypto_dma_avmm_bridge_avmm_agent_m0_byteenable),       //                         .byteenable
		.uav_readdata           (u_crypto_dma_avmm_bridge_avmm_agent_m0_readdata),         //                         .readdata
		.uav_writedata          (u_crypto_dma_avmm_bridge_avmm_agent_m0_writedata),        //                         .writedata
		.uav_lock               (u_crypto_dma_avmm_bridge_avmm_agent_m0_lock),             //                         .lock
		.uav_debugaccess        (u_crypto_dma_avmm_bridge_avmm_agent_m0_debugaccess),      //                         .debugaccess
		.av_address             (u_crypto_dma_avmm_bridge_avmm_address),                   //      avalon_anti_slave_0.address
		.av_write               (u_crypto_dma_avmm_bridge_avmm_write),                     //                         .write
		.av_read                (u_crypto_dma_avmm_bridge_avmm_read),                      //                         .read
		.av_readdata            (u_crypto_dma_avmm_bridge_avmm_readdata),                  //                         .readdata
		.av_writedata           (u_crypto_dma_avmm_bridge_avmm_writedata),                 //                         .writedata
		.av_waitrequest         (u_crypto_dma_avmm_bridge_avmm_waitrequest),               //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (7),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_crypto_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_crypto_avmm_bridge_avmm_agent_m0_address),              // avalon_universal_slave_0.address
		.uav_burstcount         (u_crypto_avmm_bridge_avmm_agent_m0_burstcount),           //                         .burstcount
		.uav_read               (u_crypto_avmm_bridge_avmm_agent_m0_read),                 //                         .read
		.uav_write              (u_crypto_avmm_bridge_avmm_agent_m0_write),                //                         .write
		.uav_waitrequest        (u_crypto_avmm_bridge_avmm_agent_m0_waitrequest),          //                         .waitrequest
		.uav_readdatavalid      (u_crypto_avmm_bridge_avmm_agent_m0_readdatavalid),        //                         .readdatavalid
		.uav_byteenable         (u_crypto_avmm_bridge_avmm_agent_m0_byteenable),           //                         .byteenable
		.uav_readdata           (u_crypto_avmm_bridge_avmm_agent_m0_readdata),             //                         .readdata
		.uav_writedata          (u_crypto_avmm_bridge_avmm_agent_m0_writedata),            //                         .writedata
		.uav_lock               (u_crypto_avmm_bridge_avmm_agent_m0_lock),                 //                         .lock
		.uav_debugaccess        (u_crypto_avmm_bridge_avmm_agent_m0_debugaccess),          //                         .debugaccess
		.av_address             (u_crypto_avmm_bridge_avmm_address),                       //      avalon_anti_slave_0.address
		.av_write               (u_crypto_avmm_bridge_avmm_write),                         //                         .write
		.av_read                (u_crypto_avmm_bridge_avmm_read),                          //                         .read
		.av_readdata            (u_crypto_avmm_bridge_avmm_readdata),                      //                         .readdata
		.av_writedata           (u_crypto_avmm_bridge_avmm_writedata),                     //                         .writedata
		.av_readdatavalid       (u_crypto_avmm_bridge_avmm_readdatavalid),                 //                         .readdatavalid
		.av_waitrequest         (u_crypto_avmm_bridge_avmm_waitrequest),                   //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (14),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_bmc_we_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                       //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     //                    reset.reset
		.uav_address            (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_burstcount),    //                         .burstcount
		.uav_read               (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_read),          //                         .read
		.uav_write              (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_write),         //                         .write
		.uav_waitrequest        (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdata),      //                         .readdata
		.uav_writedata          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_writedata),     //                         .writedata
		.uav_lock               (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_lock),          //                         .lock
		.uav_debugaccess        (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_debugaccess),   //                         .debugaccess
		.av_address             (u_spi_filter_bmc_we_avmm_bridge_avmm_address),                //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_bmc_we_avmm_bridge_avmm_write),                  //                         .write
		.av_read                (u_spi_filter_bmc_we_avmm_bridge_avmm_read),                   //                         .read
		.av_readdata            (u_spi_filter_bmc_we_avmm_bridge_avmm_readdata),               //                         .readdata
		.av_writedata           (u_spi_filter_bmc_we_avmm_bridge_avmm_writedata),              //                         .writedata
		.av_readdatavalid       (u_spi_filter_bmc_we_avmm_bridge_avmm_readdatavalid),          //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_bmc_we_avmm_bridge_avmm_waitrequest),            //                         .waitrequest
		.av_begintransfer       (),                                                            //              (terminated)
		.av_beginbursttransfer  (),                                                            //              (terminated)
		.av_burstcount          (),                                                            //              (terminated)
		.av_byteenable          (),                                                            //              (terminated)
		.av_writebyteenable     (),                                                            //              (terminated)
		.av_lock                (),                                                            //              (terminated)
		.av_chipselect          (),                                                            //              (terminated)
		.av_clken               (),                                                            //              (terminated)
		.uav_clken              (1'b0),                                                        //              (terminated)
		.av_debugaccess         (),                                                            //              (terminated)
		.av_outputenable        (),                                                            //              (terminated)
		.uav_response           (),                                                            //              (terminated)
		.av_response            (2'b00),                                                       //              (terminated)
		.uav_writeresponsevalid (),                                                            //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                         //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (14),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                               //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             //                    reset.reset
		.uav_address            (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_burstcount),    //                         .burstcount
		.uav_read               (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_read),          //                         .read
		.uav_write              (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_write),         //                         .write
		.uav_waitrequest        (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdata),      //                         .readdata
		.uav_writedata          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_writedata),     //                         .writedata
		.uav_lock               (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_lock),          //                         .lock
		.uav_debugaccess        (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess),   //                         .debugaccess
		.av_address             (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_address),                //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_write),                  //                         .write
		.av_read                (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_read),                   //                         .read
		.av_readdata            (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_readdata),               //                         .readdata
		.av_writedata           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_writedata),              //                         .writedata
		.av_readdatavalid       (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_readdatavalid),          //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_waitrequest),            //                         .waitrequest
		.av_begintransfer       (),                                                                    //              (terminated)
		.av_beginbursttransfer  (),                                                                    //              (terminated)
		.av_burstcount          (),                                                                    //              (terminated)
		.av_byteenable          (),                                                                    //              (terminated)
		.av_writebyteenable     (),                                                                    //              (terminated)
		.av_lock                (),                                                                    //              (terminated)
		.av_chipselect          (),                                                                    //              (terminated)
		.av_clken               (),                                                                    //              (terminated)
		.uav_clken              (1'b0),                                                                //              (terminated)
		.av_debugaccess         (),                                                                    //              (terminated)
		.av_outputenable        (),                                                                    //              (terminated)
		.uav_response           (),                                                                    //              (terminated)
		.av_response            (2'b00),                                                               //              (terminated)
		.uav_writeresponsevalid (),                                                                    //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                                 //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_i3c_avmm_bridge_avmm_translator (
		.clk                    (u_i3c_clk_out_clk_clk),                               //                      clk.clk
		.reset                  (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_i3c_avmm_bridge_avmm_agent_m0_address),             // avalon_universal_slave_0.address
		.uav_burstcount         (u_i3c_avmm_bridge_avmm_agent_m0_burstcount),          //                         .burstcount
		.uav_read               (u_i3c_avmm_bridge_avmm_agent_m0_read),                //                         .read
		.uav_write              (u_i3c_avmm_bridge_avmm_agent_m0_write),               //                         .write
		.uav_waitrequest        (u_i3c_avmm_bridge_avmm_agent_m0_waitrequest),         //                         .waitrequest
		.uav_readdatavalid      (u_i3c_avmm_bridge_avmm_agent_m0_readdatavalid),       //                         .readdatavalid
		.uav_byteenable         (u_i3c_avmm_bridge_avmm_agent_m0_byteenable),          //                         .byteenable
		.uav_readdata           (u_i3c_avmm_bridge_avmm_agent_m0_readdata),            //                         .readdata
		.uav_writedata          (u_i3c_avmm_bridge_avmm_agent_m0_writedata),           //                         .writedata
		.uav_lock               (u_i3c_avmm_bridge_avmm_agent_m0_lock),                //                         .lock
		.uav_debugaccess        (u_i3c_avmm_bridge_avmm_agent_m0_debugaccess),         //                         .debugaccess
		.av_address             (u_i3c_avmm_bridge_avmm_address),                      //      avalon_anti_slave_0.address
		.av_write               (u_i3c_avmm_bridge_avmm_write),                        //                         .write
		.av_read                (u_i3c_avmm_bridge_avmm_read),                         //                         .read
		.av_readdata            (u_i3c_avmm_bridge_avmm_readdata),                     //                         .readdata
		.av_writedata           (u_i3c_avmm_bridge_avmm_writedata),                    //                         .writedata
		.av_readdatavalid       (u_i3c_avmm_bridge_avmm_readdatavalid),                //                         .readdatavalid
		.av_waitrequest         (u_i3c_avmm_bridge_avmm_waitrequest),                  //                         .waitrequest
		.av_begintransfer       (),                                                    //              (terminated)
		.av_beginbursttransfer  (),                                                    //              (terminated)
		.av_burstcount          (),                                                    //              (terminated)
		.av_byteenable          (),                                                    //              (terminated)
		.av_writebyteenable     (),                                                    //              (terminated)
		.av_lock                (),                                                    //              (terminated)
		.av_chipselect          (),                                                    //              (terminated)
		.av_clken               (),                                                    //              (terminated)
		.uav_clken              (1'b0),                                                //              (terminated)
		.av_debugaccess         (),                                                    //              (terminated)
		.av_outputenable        (),                                                    //              (terminated)
		.uav_response           (),                                                    //              (terminated)
		.av_response            (2'b00),                                               //              (terminated)
		.uav_writeresponsevalid (),                                                    //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                 //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (14),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                               //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             //                    reset.reset
		.uav_address            (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_burstcount),    //                         .burstcount
		.uav_read               (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_read),          //                         .read
		.uav_write              (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_write),         //                         .write
		.uav_waitrequest        (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdata),      //                         .readdata
		.uav_writedata          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_writedata),     //                         .writedata
		.uav_lock               (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_lock),          //                         .lock
		.uav_debugaccess        (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess),   //                         .debugaccess
		.av_address             (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_address),                //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_write),                  //                         .write
		.av_read                (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_read),                   //                         .read
		.av_readdata            (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_readdata),               //                         .readdata
		.av_writedata           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_writedata),              //                         .writedata
		.av_readdatavalid       (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_readdatavalid),          //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_waitrequest),            //                         .waitrequest
		.av_begintransfer       (),                                                                    //              (terminated)
		.av_beginbursttransfer  (),                                                                    //              (terminated)
		.av_burstcount          (),                                                                    //              (terminated)
		.av_byteenable          (),                                                                    //              (terminated)
		.av_writebyteenable     (),                                                                    //              (terminated)
		.av_lock                (),                                                                    //              (terminated)
		.av_chipselect          (),                                                                    //              (terminated)
		.av_clken               (),                                                                    //              (terminated)
		.uav_clken              (1'b0),                                                                //              (terminated)
		.av_debugaccess         (),                                                                    //              (terminated)
		.av_outputenable        (),                                                                    //              (terminated)
		.uav_response           (),                                                                    //              (terminated)
		.av_response            (2'b00),                                                               //              (terminated)
		.uav_writeresponsevalid (),                                                                    //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                                 //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (14),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                               //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             //                    reset.reset
		.uav_address            (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_burstcount),    //                         .burstcount
		.uav_read               (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_read),          //                         .read
		.uav_write              (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_write),         //                         .write
		.uav_waitrequest        (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdata),      //                         .readdata
		.uav_writedata          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_writedata),     //                         .writedata
		.uav_lock               (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_lock),          //                         .lock
		.uav_debugaccess        (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess),   //                         .debugaccess
		.av_address             (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_address),                //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_write),                  //                         .write
		.av_read                (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_read),                   //                         .read
		.av_readdata            (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_readdata),               //                         .readdata
		.av_writedata           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_writedata),              //                         .writedata
		.av_readdatavalid       (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_readdatavalid),          //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_waitrequest),            //                         .waitrequest
		.av_begintransfer       (),                                                                    //              (terminated)
		.av_beginbursttransfer  (),                                                                    //              (terminated)
		.av_burstcount          (),                                                                    //              (terminated)
		.av_byteenable          (),                                                                    //              (terminated)
		.av_writebyteenable     (),                                                                    //              (terminated)
		.av_lock                (),                                                                    //              (terminated)
		.av_chipselect          (),                                                                    //              (terminated)
		.av_clken               (),                                                                    //              (terminated)
		.uav_clken              (1'b0),                                                                //              (terminated)
		.av_debugaccess         (),                                                                    //              (terminated)
		.av_outputenable        (),                                                                    //              (terminated)
		.uav_response           (),                                                                    //              (terminated)
		.av_response            (2'b00),                                                               //              (terminated)
		.uav_writeresponsevalid (),                                                                    //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                                 //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (14),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                               //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             //                    reset.reset
		.uav_address            (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_burstcount),    //                         .burstcount
		.uav_read               (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_read),          //                         .read
		.uav_write              (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_write),         //                         .write
		.uav_waitrequest        (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid      (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdata),      //                         .readdata
		.uav_writedata          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_writedata),     //                         .writedata
		.uav_lock               (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_lock),          //                         .lock
		.uav_debugaccess        (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess),   //                         .debugaccess
		.av_address             (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_address),                //      avalon_anti_slave_0.address
		.av_write               (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_write),                  //                         .write
		.av_read                (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_read),                   //                         .read
		.av_readdata            (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_readdata),               //                         .readdata
		.av_writedata           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_writedata),              //                         .writedata
		.av_readdatavalid       (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_readdatavalid),          //                         .readdatavalid
		.av_waitrequest         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_waitrequest),            //                         .waitrequest
		.av_begintransfer       (),                                                                    //              (terminated)
		.av_beginbursttransfer  (),                                                                    //              (terminated)
		.av_burstcount          (),                                                                    //              (terminated)
		.av_byteenable          (),                                                                    //              (terminated)
		.av_writebyteenable     (),                                                                    //              (terminated)
		.av_lock                (),                                                                    //              (terminated)
		.av_chipselect          (),                                                                    //              (terminated)
		.av_clken               (),                                                                    //              (terminated)
		.uav_clken              (1'b0),                                                                //              (terminated)
		.av_debugaccess         (),                                                                    //              (terminated)
		.av_outputenable        (),                                                                    //              (terminated)
		.uav_response           (),                                                                    //              (terminated)
		.av_response            (2'b00),                                                               //              (terminated)
		.uav_writeresponsevalid (),                                                                    //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                                 //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_relay2_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_relay2_avmm_bridge_avmm_agent_m0_address),              // avalon_universal_slave_0.address
		.uav_burstcount         (u_relay2_avmm_bridge_avmm_agent_m0_burstcount),           //                         .burstcount
		.uav_read               (u_relay2_avmm_bridge_avmm_agent_m0_read),                 //                         .read
		.uav_write              (u_relay2_avmm_bridge_avmm_agent_m0_write),                //                         .write
		.uav_waitrequest        (u_relay2_avmm_bridge_avmm_agent_m0_waitrequest),          //                         .waitrequest
		.uav_readdatavalid      (u_relay2_avmm_bridge_avmm_agent_m0_readdatavalid),        //                         .readdatavalid
		.uav_byteenable         (u_relay2_avmm_bridge_avmm_agent_m0_byteenable),           //                         .byteenable
		.uav_readdata           (u_relay2_avmm_bridge_avmm_agent_m0_readdata),             //                         .readdata
		.uav_writedata          (u_relay2_avmm_bridge_avmm_agent_m0_writedata),            //                         .writedata
		.uav_lock               (u_relay2_avmm_bridge_avmm_agent_m0_lock),                 //                         .lock
		.uav_debugaccess        (u_relay2_avmm_bridge_avmm_agent_m0_debugaccess),          //                         .debugaccess
		.av_address             (u_relay2_avmm_bridge_avmm_address),                       //      avalon_anti_slave_0.address
		.av_write               (u_relay2_avmm_bridge_avmm_write),                         //                         .write
		.av_read                (u_relay2_avmm_bridge_avmm_read),                          //                         .read
		.av_readdata            (u_relay2_avmm_bridge_avmm_readdata),                      //                         .readdata
		.av_writedata           (u_relay2_avmm_bridge_avmm_writedata),                     //                         .writedata
		.av_waitrequest         (u_relay2_avmm_bridge_avmm_waitrequest),                   //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (8),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_aes_avmm_bridge_avmm_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_aes_avmm_bridge_avmm_agent_m0_address),                 // avalon_universal_slave_0.address
		.uav_burstcount         (u_aes_avmm_bridge_avmm_agent_m0_burstcount),              //                         .burstcount
		.uav_read               (u_aes_avmm_bridge_avmm_agent_m0_read),                    //                         .read
		.uav_write              (u_aes_avmm_bridge_avmm_agent_m0_write),                   //                         .write
		.uav_waitrequest        (u_aes_avmm_bridge_avmm_agent_m0_waitrequest),             //                         .waitrequest
		.uav_readdatavalid      (u_aes_avmm_bridge_avmm_agent_m0_readdatavalid),           //                         .readdatavalid
		.uav_byteenable         (u_aes_avmm_bridge_avmm_agent_m0_byteenable),              //                         .byteenable
		.uav_readdata           (u_aes_avmm_bridge_avmm_agent_m0_readdata),                //                         .readdata
		.uav_writedata          (u_aes_avmm_bridge_avmm_agent_m0_writedata),               //                         .writedata
		.uav_lock               (u_aes_avmm_bridge_avmm_agent_m0_lock),                    //                         .lock
		.uav_debugaccess        (u_aes_avmm_bridge_avmm_agent_m0_debugaccess),             //                         .debugaccess
		.av_address             (u_aes_avmm_bridge_avmm_address),                          //      avalon_anti_slave_0.address
		.av_write               (u_aes_avmm_bridge_avmm_write),                            //                         .write
		.av_read                (u_aes_avmm_bridge_avmm_read),                             //                         .read
		.av_readdata            (u_aes_avmm_bridge_avmm_readdata),                         //                         .readdata
		.av_writedata           (u_aes_avmm_bridge_avmm_writedata),                        //                         .writedata
		.av_readdatavalid       (u_aes_avmm_bridge_avmm_readdatavalid),                    //                         .readdatavalid
		.av_waitrequest         (u_aes_avmm_bridge_avmm_waitrequest),                      //                         .waitrequest
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_ufm_csr_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_ufm_csr_agent_m0_address),                              // avalon_universal_slave_0.address
		.uav_burstcount         (u_ufm_csr_agent_m0_burstcount),                           //                         .burstcount
		.uav_read               (u_ufm_csr_agent_m0_read),                                 //                         .read
		.uav_write              (u_ufm_csr_agent_m0_write),                                //                         .write
		.uav_waitrequest        (u_ufm_csr_agent_m0_waitrequest),                          //                         .waitrequest
		.uav_readdatavalid      (u_ufm_csr_agent_m0_readdatavalid),                        //                         .readdatavalid
		.uav_byteenable         (u_ufm_csr_agent_m0_byteenable),                           //                         .byteenable
		.uav_readdata           (u_ufm_csr_agent_m0_readdata),                             //                         .readdata
		.uav_writedata          (u_ufm_csr_agent_m0_writedata),                            //                         .writedata
		.uav_lock               (u_ufm_csr_agent_m0_lock),                                 //                         .lock
		.uav_debugaccess        (u_ufm_csr_agent_m0_debugaccess),                          //                         .debugaccess
		.av_address             (u_ufm_csr_address),                                       //      avalon_anti_slave_0.address
		.av_write               (u_ufm_csr_write),                                         //                         .write
		.av_read                (u_ufm_csr_read),                                          //                         .read
		.av_readdata            (u_ufm_csr_readdata),                                      //                         .readdata
		.av_writedata           (u_ufm_csr_writedata),                                     //                         .writedata
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_global_state_reg_s1_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_global_state_reg_s1_agent_m0_address),                  // avalon_universal_slave_0.address
		.uav_burstcount         (u_global_state_reg_s1_agent_m0_burstcount),               //                         .burstcount
		.uav_read               (u_global_state_reg_s1_agent_m0_read),                     //                         .read
		.uav_write              (u_global_state_reg_s1_agent_m0_write),                    //                         .write
		.uav_waitrequest        (u_global_state_reg_s1_agent_m0_waitrequest),              //                         .waitrequest
		.uav_readdatavalid      (u_global_state_reg_s1_agent_m0_readdatavalid),            //                         .readdatavalid
		.uav_byteenable         (u_global_state_reg_s1_agent_m0_byteenable),               //                         .byteenable
		.uav_readdata           (u_global_state_reg_s1_agent_m0_readdata),                 //                         .readdata
		.uav_writedata          (u_global_state_reg_s1_agent_m0_writedata),                //                         .writedata
		.uav_lock               (u_global_state_reg_s1_agent_m0_lock),                     //                         .lock
		.uav_debugaccess        (u_global_state_reg_s1_agent_m0_debugaccess),              //                         .debugaccess
		.av_address             (u_global_state_reg_s1_address),                           //      avalon_anti_slave_0.address
		.av_write               (u_global_state_reg_s1_write),                             //                         .write
		.av_readdata            (u_global_state_reg_s1_readdata),                          //                         .readdata
		.av_writedata           (u_global_state_reg_s1_writedata),                         //                         .writedata
		.av_chipselect          (u_global_state_reg_s1_chipselect),                        //                         .chipselect
		.av_read                (),                                                        //              (terminated)
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_gpo_1_s1_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_gpo_1_s1_agent_m0_address),                             // avalon_universal_slave_0.address
		.uav_burstcount         (u_gpo_1_s1_agent_m0_burstcount),                          //                         .burstcount
		.uav_read               (u_gpo_1_s1_agent_m0_read),                                //                         .read
		.uav_write              (u_gpo_1_s1_agent_m0_write),                               //                         .write
		.uav_waitrequest        (u_gpo_1_s1_agent_m0_waitrequest),                         //                         .waitrequest
		.uav_readdatavalid      (u_gpo_1_s1_agent_m0_readdatavalid),                       //                         .readdatavalid
		.uav_byteenable         (u_gpo_1_s1_agent_m0_byteenable),                          //                         .byteenable
		.uav_readdata           (u_gpo_1_s1_agent_m0_readdata),                            //                         .readdata
		.uav_writedata          (u_gpo_1_s1_agent_m0_writedata),                           //                         .writedata
		.uav_lock               (u_gpo_1_s1_agent_m0_lock),                                //                         .lock
		.uav_debugaccess        (u_gpo_1_s1_agent_m0_debugaccess),                         //                         .debugaccess
		.av_address             (u_gpo_1_s1_address),                                      //      avalon_anti_slave_0.address
		.av_write               (u_gpo_1_s1_write),                                        //                         .write
		.av_readdata            (u_gpo_1_s1_readdata),                                     //                         .readdata
		.av_writedata           (u_gpo_1_s1_writedata),                                    //                         .writedata
		.av_chipselect          (u_gpo_1_s1_chipselect),                                   //                         .chipselect
		.av_read                (),                                                        //              (terminated)
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_gpi_1_s1_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_gpi_1_s1_agent_m0_address),                             // avalon_universal_slave_0.address
		.uav_burstcount         (u_gpi_1_s1_agent_m0_burstcount),                          //                         .burstcount
		.uav_read               (u_gpi_1_s1_agent_m0_read),                                //                         .read
		.uav_write              (u_gpi_1_s1_agent_m0_write),                               //                         .write
		.uav_waitrequest        (u_gpi_1_s1_agent_m0_waitrequest),                         //                         .waitrequest
		.uav_readdatavalid      (u_gpi_1_s1_agent_m0_readdatavalid),                       //                         .readdatavalid
		.uav_byteenable         (u_gpi_1_s1_agent_m0_byteenable),                          //                         .byteenable
		.uav_readdata           (u_gpi_1_s1_agent_m0_readdata),                            //                         .readdata
		.uav_writedata          (u_gpi_1_s1_agent_m0_writedata),                           //                         .writedata
		.uav_lock               (u_gpi_1_s1_agent_m0_lock),                                //                         .lock
		.uav_debugaccess        (u_gpi_1_s1_agent_m0_debugaccess),                         //                         .debugaccess
		.av_address             (u_gpi_1_s1_address),                                      //      avalon_anti_slave_0.address
		.av_readdata            (u_gpi_1_s1_readdata),                                     //                         .readdata
		.av_write               (),                                                        //              (terminated)
		.av_read                (),                                                        //              (terminated)
		.av_writedata           (),                                                        //              (terminated)
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_chipselect          (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) u_gpo_2_s1_translator (
		.clk                    (u_sys_clk_out_clk_clk),                                   //                      clk.clk
		.reset                  (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address            (u_gpo_2_s1_agent_m0_address),                             // avalon_universal_slave_0.address
		.uav_burstcount         (u_gpo_2_s1_agent_m0_burstcount),                          //                         .burstcount
		.uav_read               (u_gpo_2_s1_agent_m0_read),                                //                         .read
		.uav_write              (u_gpo_2_s1_agent_m0_write),                               //                         .write
		.uav_waitrequest        (u_gpo_2_s1_agent_m0_waitrequest),                         //                         .waitrequest
		.uav_readdatavalid      (u_gpo_2_s1_agent_m0_readdatavalid),                       //                         .readdatavalid
		.uav_byteenable         (u_gpo_2_s1_agent_m0_byteenable),                          //                         .byteenable
		.uav_readdata           (u_gpo_2_s1_agent_m0_readdata),                            //                         .readdata
		.uav_writedata          (u_gpo_2_s1_agent_m0_writedata),                           //                         .writedata
		.uav_lock               (u_gpo_2_s1_agent_m0_lock),                                //                         .lock
		.uav_debugaccess        (u_gpo_2_s1_agent_m0_debugaccess),                         //                         .debugaccess
		.av_address             (u_gpo_2_s1_address),                                      //      avalon_anti_slave_0.address
		.av_write               (u_gpo_2_s1_write),                                        //                         .write
		.av_readdata            (u_gpo_2_s1_readdata),                                     //                         .readdata
		.av_writedata           (u_gpo_2_s1_writedata),                                    //                         .writedata
		.av_chipselect          (u_gpo_2_s1_chipselect),                                   //                         .chipselect
		.av_read                (),                                                        //              (terminated)
		.av_begintransfer       (),                                                        //              (terminated)
		.av_beginbursttransfer  (),                                                        //              (terminated)
		.av_burstcount          (),                                                        //              (terminated)
		.av_byteenable          (),                                                        //              (terminated)
		.av_readdatavalid       (1'b0),                                                    //              (terminated)
		.av_waitrequest         (1'b0),                                                    //              (terminated)
		.av_writebyteenable     (),                                                        //              (terminated)
		.av_lock                (),                                                        //              (terminated)
		.av_clken               (),                                                        //              (terminated)
		.uav_clken              (1'b0),                                                    //              (terminated)
		.av_debugaccess         (),                                                        //              (terminated)
		.av_outputenable        (),                                                        //              (terminated)
		.uav_response           (),                                                        //              (terminated)
		.av_response            (2'b00),                                                   //              (terminated)
		.uav_writeresponsevalid (),                                                        //              (terminated)
		.av_writeresponsevalid  (1'b0)                                                     //              (terminated)
	);

	altera_merlin_master_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_QOS_H                 (93),
		.PKT_QOS_L                 (93),
		.PKT_DATA_SIDEBAND_H       (91),
		.PKT_DATA_SIDEBAND_L       (91),
		.PKT_ADDR_SIDEBAND_H       (90),
		.PKT_ADDR_SIDEBAND_L       (90),
		.PKT_BURST_TYPE_H          (89),
		.PKT_BURST_TYPE_L          (88),
		.PKT_CACHE_H               (111),
		.PKT_CACHE_L               (108),
		.PKT_THREAD_ID_H           (104),
		.PKT_THREAD_ID_L           (104),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_EXCLUSIVE       (73),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (26),
		.AV_BURSTCOUNT_W           (8),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (0),
		.BURSTWRAP_VALUE           (7),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) dma_ufm_avmm_bridge_0_avmm_agent (
		.clk                   (u_sys_clk_out_clk_clk),                                                         //       clk.clk
		.reset                 (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       // clk_reset.reset
		.av_address            (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_address),       //        av.address
		.av_write              (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_write),         //          .write
		.av_read               (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata          (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata           (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest        (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid      (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable         (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount         (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess        (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock               (dma_ufm_avmm_bridge_0_avmm_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid              (dma_ufm_avmm_bridge_0_avmm_agent_cp_valid),                                     //        cp.valid
		.cp_data               (dma_ufm_avmm_bridge_0_avmm_agent_cp_data),                                      //          .data
		.cp_startofpacket      (dma_ufm_avmm_bridge_0_avmm_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket        (dma_ufm_avmm_bridge_0_avmm_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready              (dma_ufm_avmm_bridge_0_avmm_agent_cp_ready),                                     //          .ready
		.rp_valid              (rsp_mux_src_valid),                                                             //        rp.valid
		.rp_data               (rsp_mux_src_data),                                                              //          .data
		.rp_channel            (rsp_mux_src_channel),                                                           //          .channel
		.rp_startofpacket      (rsp_mux_src_startofpacket),                                                     //          .startofpacket
		.rp_endofpacket        (rsp_mux_src_endofpacket),                                                       //          .endofpacket
		.rp_ready              (rsp_mux_src_ready),                                                             //          .ready
		.av_response           (),                                                                              // (terminated)
		.av_writeresponsevalid ()                                                                               // (terminated)
	);

	altera_merlin_master_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_QOS_H                 (93),
		.PKT_QOS_L                 (93),
		.PKT_DATA_SIDEBAND_H       (91),
		.PKT_DATA_SIDEBAND_L       (91),
		.PKT_ADDR_SIDEBAND_H       (90),
		.PKT_ADDR_SIDEBAND_L       (90),
		.PKT_BURST_TYPE_H          (89),
		.PKT_BURST_TYPE_L          (88),
		.PKT_CACHE_H               (111),
		.PKT_CACHE_L               (108),
		.PKT_THREAD_ID_H           (104),
		.PKT_THREAD_ID_L           (104),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_EXCLUSIVE       (73),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (26),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (1),
		.BURSTWRAP_VALUE           (7),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) u_nios_data_master_agent (
		.clk                   (u_sys_clk_out_clk_clk),                                                 //       clk.clk
		.reset                 (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),               // clk_reset.reset
		.av_address            (u_nios_data_master_translator_avalon_universal_master_0_address),       //        av.address
		.av_write              (u_nios_data_master_translator_avalon_universal_master_0_write),         //          .write
		.av_read               (u_nios_data_master_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata          (u_nios_data_master_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata           (u_nios_data_master_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest        (u_nios_data_master_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid      (u_nios_data_master_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable         (u_nios_data_master_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount         (u_nios_data_master_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess        (u_nios_data_master_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock               (u_nios_data_master_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid              (u_nios_data_master_agent_cp_valid),                                     //        cp.valid
		.cp_data               (u_nios_data_master_agent_cp_data),                                      //          .data
		.cp_startofpacket      (u_nios_data_master_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket        (u_nios_data_master_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready              (u_nios_data_master_agent_cp_ready),                                     //          .ready
		.rp_valid              (rsp_mux_001_src_valid),                                                 //        rp.valid
		.rp_data               (rsp_mux_001_src_data),                                                  //          .data
		.rp_channel            (rsp_mux_001_src_channel),                                               //          .channel
		.rp_startofpacket      (rsp_mux_001_src_startofpacket),                                         //          .startofpacket
		.rp_endofpacket        (rsp_mux_001_src_endofpacket),                                           //          .endofpacket
		.rp_ready              (rsp_mux_001_src_ready),                                                 //          .ready
		.av_response           (),                                                                      // (terminated)
		.av_writeresponsevalid ()                                                                       // (terminated)
	);

	altera_merlin_master_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_QOS_H                 (93),
		.PKT_QOS_L                 (93),
		.PKT_DATA_SIDEBAND_H       (91),
		.PKT_DATA_SIDEBAND_L       (91),
		.PKT_ADDR_SIDEBAND_H       (90),
		.PKT_ADDR_SIDEBAND_L       (90),
		.PKT_BURST_TYPE_H          (89),
		.PKT_BURST_TYPE_L          (88),
		.PKT_CACHE_H               (111),
		.PKT_CACHE_L               (108),
		.PKT_THREAD_ID_H           (104),
		.PKT_THREAD_ID_L           (104),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_EXCLUSIVE       (73),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (26),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (2),
		.BURSTWRAP_VALUE           (3),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) u_nios_instruction_master_agent (
		.clk                   (u_sys_clk_out_clk_clk),                                                        //       clk.clk
		.reset                 (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                      // clk_reset.reset
		.av_address            (u_nios_instruction_master_translator_avalon_universal_master_0_address),       //        av.address
		.av_write              (u_nios_instruction_master_translator_avalon_universal_master_0_write),         //          .write
		.av_read               (u_nios_instruction_master_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata          (u_nios_instruction_master_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata           (u_nios_instruction_master_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest        (u_nios_instruction_master_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid      (u_nios_instruction_master_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable         (u_nios_instruction_master_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount         (u_nios_instruction_master_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess        (u_nios_instruction_master_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock               (u_nios_instruction_master_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid              (u_nios_instruction_master_agent_cp_valid),                                     //        cp.valid
		.cp_data               (u_nios_instruction_master_agent_cp_data),                                      //          .data
		.cp_startofpacket      (u_nios_instruction_master_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket        (u_nios_instruction_master_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready              (u_nios_instruction_master_agent_cp_ready),                                     //          .ready
		.rp_valid              (rsp_mux_002_src_valid),                                                        //        rp.valid
		.rp_data               (rsp_mux_002_src_data),                                                         //          .data
		.rp_channel            (rsp_mux_002_src_channel),                                                      //          .channel
		.rp_startofpacket      (rsp_mux_002_src_startofpacket),                                                //          .startofpacket
		.rp_endofpacket        (rsp_mux_002_src_endofpacket),                                                  //          .endofpacket
		.rp_ready              (rsp_mux_002_src_ready),                                                        //          .ready
		.av_response           (),                                                                             // (terminated)
		.av_writeresponsevalid ()                                                                              // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (4),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_ufm_data_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_ufm_data_agent_m0_address),                             //              m0.address
		.m0_burstcount           (u_ufm_data_agent_m0_burstcount),                          //                .burstcount
		.m0_byteenable           (u_ufm_data_agent_m0_byteenable),                          //                .byteenable
		.m0_debugaccess          (u_ufm_data_agent_m0_debugaccess),                         //                .debugaccess
		.m0_lock                 (u_ufm_data_agent_m0_lock),                                //                .lock
		.m0_readdata             (u_ufm_data_agent_m0_readdata),                            //                .readdata
		.m0_readdatavalid        (u_ufm_data_agent_m0_readdatavalid),                       //                .readdatavalid
		.m0_read                 (u_ufm_data_agent_m0_read),                                //                .read
		.m0_waitrequest          (u_ufm_data_agent_m0_waitrequest),                         //                .waitrequest
		.m0_writedata            (u_ufm_data_agent_m0_writedata),                           //                .writedata
		.m0_write                (u_ufm_data_agent_m0_write),                               //                .write
		.rp_endofpacket          (u_ufm_data_agent_rp_endofpacket),                         //              rp.endofpacket
		.rp_ready                (u_ufm_data_agent_rp_ready),                               //                .ready
		.rp_valid                (u_ufm_data_agent_rp_valid),                               //                .valid
		.rp_data                 (u_ufm_data_agent_rp_data),                                //                .data
		.rp_startofpacket        (u_ufm_data_agent_rp_startofpacket),                       //                .startofpacket
		.cp_ready                (u_ufm_data_burst_adapter_source0_ready),                  //              cp.ready
		.cp_valid                (u_ufm_data_burst_adapter_source0_valid),                  //                .valid
		.cp_data                 (u_ufm_data_burst_adapter_source0_data),                   //                .data
		.cp_startofpacket        (u_ufm_data_burst_adapter_source0_startofpacket),          //                .startofpacket
		.cp_endofpacket          (u_ufm_data_burst_adapter_source0_endofpacket),            //                .endofpacket
		.cp_channel              (u_ufm_data_burst_adapter_source0_channel),                //                .channel
		.rf_sink_ready           (u_ufm_data_agent_rsp_fifo_out_ready),                     //         rf_sink.ready
		.rf_sink_valid           (u_ufm_data_agent_rsp_fifo_out_valid),                     //                .valid
		.rf_sink_startofpacket   (u_ufm_data_agent_rsp_fifo_out_startofpacket),             //                .startofpacket
		.rf_sink_endofpacket     (u_ufm_data_agent_rsp_fifo_out_endofpacket),               //                .endofpacket
		.rf_sink_data            (u_ufm_data_agent_rsp_fifo_out_data),                      //                .data
		.rf_source_ready         (u_ufm_data_agent_rf_source_ready),                        //       rf_source.ready
		.rf_source_valid         (u_ufm_data_agent_rf_source_valid),                        //                .valid
		.rf_source_startofpacket (u_ufm_data_agent_rf_source_startofpacket),                //                .startofpacket
		.rf_source_endofpacket   (u_ufm_data_agent_rf_source_endofpacket),                  //                .endofpacket
		.rf_source_data          (u_ufm_data_agent_rf_source_data),                         //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_out_0_ready),                           // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_out_0_valid),                           //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_out_0_data),                            //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_out_0_error),                           //                .error
		.rdata_fifo_src_ready    (u_ufm_data_agent_rdata_fifo_src_ready),                   //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_ufm_data_agent_rdata_fifo_src_valid),                   //                .valid
		.rdata_fifo_src_data     (u_ufm_data_agent_rdata_fifo_src_data),                    //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_ufm_data_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_ufm_data_agent_rf_source_data),                         //        in.data
		.in_valid          (u_ufm_data_agent_rf_source_valid),                        //          .valid
		.in_ready          (u_ufm_data_agent_rf_source_ready),                        //          .ready
		.in_startofpacket  (u_ufm_data_agent_rf_source_startofpacket),                //          .startofpacket
		.in_endofpacket    (u_ufm_data_agent_rf_source_endofpacket),                  //          .endofpacket
		.out_data          (u_ufm_data_agent_rsp_fifo_out_data),                      //       out.data
		.out_valid         (u_ufm_data_agent_rsp_fifo_out_valid),                     //          .valid
		.out_ready         (u_ufm_data_agent_rsp_fifo_out_ready),                     //          .ready
		.out_startofpacket (u_ufm_data_agent_rsp_fifo_out_startofpacket),             //          .startofpacket
		.out_endofpacket   (u_ufm_data_agent_rsp_fifo_out_endofpacket),               //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_nios_debug_mem_slave_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_nios_debug_mem_slave_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_nios_debug_mem_slave_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_nios_debug_mem_slave_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_nios_debug_mem_slave_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_nios_debug_mem_slave_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_nios_debug_mem_slave_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_nios_debug_mem_slave_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_nios_debug_mem_slave_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_nios_debug_mem_slave_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_nios_debug_mem_slave_agent_m0_writedata),               //                .writedata
		.m0_write                (u_nios_debug_mem_slave_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_nios_debug_mem_slave_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_nios_debug_mem_slave_agent_rp_ready),                   //                .ready
		.rp_valid                (u_nios_debug_mem_slave_agent_rp_valid),                   //                .valid
		.rp_data                 (u_nios_debug_mem_slave_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_nios_debug_mem_slave_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_001_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_001_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_001_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_001_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_001_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_001_src_channel),                                 //                .channel
		.rf_sink_ready           (u_nios_debug_mem_slave_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_nios_debug_mem_slave_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_nios_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_nios_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_nios_debug_mem_slave_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_nios_debug_mem_slave_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_nios_debug_mem_slave_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_nios_debug_mem_slave_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_nios_debug_mem_slave_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_nios_debug_mem_slave_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_001_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_001_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_001_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_001_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_nios_debug_mem_slave_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_nios_debug_mem_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_nios_debug_mem_slave_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_nios_debug_mem_slave_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_nios_debug_mem_slave_agent_rf_source_data),             //        in.data
		.in_valid          (u_nios_debug_mem_slave_agent_rf_source_valid),            //          .valid
		.in_ready          (u_nios_debug_mem_slave_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_nios_debug_mem_slave_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_nios_debug_mem_slave_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_nios_debug_mem_slave_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_nios_debug_mem_slave_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_nios_debug_mem_slave_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_nios_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_nios_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_nios_ram_s1_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_nios_ram_s1_agent_m0_address),                          //              m0.address
		.m0_burstcount           (u_nios_ram_s1_agent_m0_burstcount),                       //                .burstcount
		.m0_byteenable           (u_nios_ram_s1_agent_m0_byteenable),                       //                .byteenable
		.m0_debugaccess          (u_nios_ram_s1_agent_m0_debugaccess),                      //                .debugaccess
		.m0_lock                 (u_nios_ram_s1_agent_m0_lock),                             //                .lock
		.m0_readdata             (u_nios_ram_s1_agent_m0_readdata),                         //                .readdata
		.m0_readdatavalid        (u_nios_ram_s1_agent_m0_readdatavalid),                    //                .readdatavalid
		.m0_read                 (u_nios_ram_s1_agent_m0_read),                             //                .read
		.m0_waitrequest          (u_nios_ram_s1_agent_m0_waitrequest),                      //                .waitrequest
		.m0_writedata            (u_nios_ram_s1_agent_m0_writedata),                        //                .writedata
		.m0_write                (u_nios_ram_s1_agent_m0_write),                            //                .write
		.rp_endofpacket          (u_nios_ram_s1_agent_rp_endofpacket),                      //              rp.endofpacket
		.rp_ready                (u_nios_ram_s1_agent_rp_ready),                            //                .ready
		.rp_valid                (u_nios_ram_s1_agent_rp_valid),                            //                .valid
		.rp_data                 (u_nios_ram_s1_agent_rp_data),                             //                .data
		.rp_startofpacket        (u_nios_ram_s1_agent_rp_startofpacket),                    //                .startofpacket
		.cp_ready                (cmd_mux_002_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_002_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_002_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_002_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_002_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_002_src_channel),                                 //                .channel
		.rf_sink_ready           (u_nios_ram_s1_agent_rsp_fifo_out_ready),                  //         rf_sink.ready
		.rf_sink_valid           (u_nios_ram_s1_agent_rsp_fifo_out_valid),                  //                .valid
		.rf_sink_startofpacket   (u_nios_ram_s1_agent_rsp_fifo_out_startofpacket),          //                .startofpacket
		.rf_sink_endofpacket     (u_nios_ram_s1_agent_rsp_fifo_out_endofpacket),            //                .endofpacket
		.rf_sink_data            (u_nios_ram_s1_agent_rsp_fifo_out_data),                   //                .data
		.rf_source_ready         (u_nios_ram_s1_agent_rf_source_ready),                     //       rf_source.ready
		.rf_source_valid         (u_nios_ram_s1_agent_rf_source_valid),                     //                .valid
		.rf_source_startofpacket (u_nios_ram_s1_agent_rf_source_startofpacket),             //                .startofpacket
		.rf_source_endofpacket   (u_nios_ram_s1_agent_rf_source_endofpacket),               //                .endofpacket
		.rf_source_data          (u_nios_ram_s1_agent_rf_source_data),                      //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_002_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_002_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_002_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_002_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_nios_ram_s1_agent_rdata_fifo_src_ready),                //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_nios_ram_s1_agent_rdata_fifo_src_valid),                //                .valid
		.rdata_fifo_src_data     (u_nios_ram_s1_agent_rdata_fifo_src_data),                 //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_nios_ram_s1_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_nios_ram_s1_agent_rf_source_data),                      //        in.data
		.in_valid          (u_nios_ram_s1_agent_rf_source_valid),                     //          .valid
		.in_ready          (u_nios_ram_s1_agent_rf_source_ready),                     //          .ready
		.in_startofpacket  (u_nios_ram_s1_agent_rf_source_startofpacket),             //          .startofpacket
		.in_endofpacket    (u_nios_ram_s1_agent_rf_source_endofpacket),               //          .endofpacket
		.out_data          (u_nios_ram_s1_agent_rsp_fifo_out_data),                   //       out.data
		.out_valid         (u_nios_ram_s1_agent_rsp_fifo_out_valid),                  //          .valid
		.out_ready         (u_nios_ram_s1_agent_rsp_fifo_out_ready),                  //          .ready
		.out_startofpacket (u_nios_ram_s1_agent_rsp_fifo_out_startofpacket),          //          .startofpacket
		.out_endofpacket   (u_nios_ram_s1_agent_rsp_fifo_out_endofpacket),            //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_dual_config_avalon_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_dual_config_avalon_agent_m0_address),                   //              m0.address
		.m0_burstcount           (u_dual_config_avalon_agent_m0_burstcount),                //                .burstcount
		.m0_byteenable           (u_dual_config_avalon_agent_m0_byteenable),                //                .byteenable
		.m0_debugaccess          (u_dual_config_avalon_agent_m0_debugaccess),               //                .debugaccess
		.m0_lock                 (u_dual_config_avalon_agent_m0_lock),                      //                .lock
		.m0_readdata             (u_dual_config_avalon_agent_m0_readdata),                  //                .readdata
		.m0_readdatavalid        (u_dual_config_avalon_agent_m0_readdatavalid),             //                .readdatavalid
		.m0_read                 (u_dual_config_avalon_agent_m0_read),                      //                .read
		.m0_waitrequest          (u_dual_config_avalon_agent_m0_waitrequest),               //                .waitrequest
		.m0_writedata            (u_dual_config_avalon_agent_m0_writedata),                 //                .writedata
		.m0_write                (u_dual_config_avalon_agent_m0_write),                     //                .write
		.rp_endofpacket          (u_dual_config_avalon_agent_rp_endofpacket),               //              rp.endofpacket
		.rp_ready                (u_dual_config_avalon_agent_rp_ready),                     //                .ready
		.rp_valid                (u_dual_config_avalon_agent_rp_valid),                     //                .valid
		.rp_data                 (u_dual_config_avalon_agent_rp_data),                      //                .data
		.rp_startofpacket        (u_dual_config_avalon_agent_rp_startofpacket),             //                .startofpacket
		.cp_ready                (cmd_mux_003_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_003_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_003_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_003_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_003_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_003_src_channel),                                 //                .channel
		.rf_sink_ready           (u_dual_config_avalon_agent_rsp_fifo_out_ready),           //         rf_sink.ready
		.rf_sink_valid           (u_dual_config_avalon_agent_rsp_fifo_out_valid),           //                .valid
		.rf_sink_startofpacket   (u_dual_config_avalon_agent_rsp_fifo_out_startofpacket),   //                .startofpacket
		.rf_sink_endofpacket     (u_dual_config_avalon_agent_rsp_fifo_out_endofpacket),     //                .endofpacket
		.rf_sink_data            (u_dual_config_avalon_agent_rsp_fifo_out_data),            //                .data
		.rf_source_ready         (u_dual_config_avalon_agent_rf_source_ready),              //       rf_source.ready
		.rf_source_valid         (u_dual_config_avalon_agent_rf_source_valid),              //                .valid
		.rf_source_startofpacket (u_dual_config_avalon_agent_rf_source_startofpacket),      //                .startofpacket
		.rf_source_endofpacket   (u_dual_config_avalon_agent_rf_source_endofpacket),        //                .endofpacket
		.rf_source_data          (u_dual_config_avalon_agent_rf_source_data),               //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_003_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_003_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_003_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_003_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_dual_config_avalon_agent_rdata_fifo_src_ready),         //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_dual_config_avalon_agent_rdata_fifo_src_valid),         //                .valid
		.rdata_fifo_src_data     (u_dual_config_avalon_agent_rdata_fifo_src_data),          //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_dual_config_avalon_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_dual_config_avalon_agent_rf_source_data),               //        in.data
		.in_valid          (u_dual_config_avalon_agent_rf_source_valid),              //          .valid
		.in_ready          (u_dual_config_avalon_agent_rf_source_ready),              //          .ready
		.in_startofpacket  (u_dual_config_avalon_agent_rf_source_startofpacket),      //          .startofpacket
		.in_endofpacket    (u_dual_config_avalon_agent_rf_source_endofpacket),        //          .endofpacket
		.out_data          (u_dual_config_avalon_agent_rsp_fifo_out_data),            //       out.data
		.out_valid         (u_dual_config_avalon_agent_rsp_fifo_out_valid),           //          .valid
		.out_ready         (u_dual_config_avalon_agent_rsp_fifo_out_ready),           //          .ready
		.out_startofpacket (u_dual_config_avalon_agent_rsp_fifo_out_startofpacket),   //          .startofpacket
		.out_endofpacket   (u_dual_config_avalon_agent_rsp_fifo_out_endofpacket),     //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_relay1_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                      //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
		.m0_address              (u_relay1_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_relay1_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_relay1_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_relay1_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_relay1_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_relay1_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_relay1_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_relay1_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_relay1_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_relay1_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_relay1_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_relay1_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_relay1_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_relay1_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_relay1_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_relay1_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_004_src_ready),                                      //              cp.ready
		.cp_valid                (cmd_mux_004_src_valid),                                      //                .valid
		.cp_data                 (cmd_mux_004_src_data),                                       //                .data
		.cp_startofpacket        (cmd_mux_004_src_startofpacket),                              //                .startofpacket
		.cp_endofpacket          (cmd_mux_004_src_endofpacket),                                //                .endofpacket
		.cp_channel              (cmd_mux_004_src_channel),                                    //                .channel
		.rf_sink_ready           (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_relay1_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_relay1_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_relay1_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_relay1_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_relay1_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_004_out_0_ready),                          // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_004_out_0_valid),                          //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_004_out_0_data),                           //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_004_out_0_error),                          //                .error
		.rdata_fifo_src_ready    (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                      //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_relay1_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                      //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
		.in_data           (u_relay1_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_relay1_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_relay1_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_relay1_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_relay1_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_relay1_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                      // (terminated)
		.csr_read          (1'b0),                                                       // (terminated)
		.csr_write         (1'b0),                                                       // (terminated)
		.csr_readdata      (),                                                           // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                       // (terminated)
		.almost_full_data  (),                                                           // (terminated)
		.almost_empty_data (),                                                           // (terminated)
		.in_empty          (1'b0),                                                       // (terminated)
		.out_empty         (),                                                           // (terminated)
		.in_error          (1'b0),                                                       // (terminated)
		.out_error         (),                                                           // (terminated)
		.in_channel        (1'b0),                                                       // (terminated)
		.out_channel       ()                                                            // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_csr_avmm_bridge_0_avmm_agent (
		.clk                     (u_spi_clk_out_clk_clk),                                                //             clk.clk
		.reset                   (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     //       clk_reset.reset
		.m0_address              (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_csr_avmm_bridge_0_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_005_src_ready),                                                //              cp.ready
		.cp_valid                (cmd_mux_005_src_valid),                                                //                .valid
		.cp_data                 (cmd_mux_005_src_data),                                                 //                .data
		.cp_startofpacket        (cmd_mux_005_src_startofpacket),                                        //                .startofpacket
		.cp_endofpacket          (cmd_mux_005_src_endofpacket),                                          //                .endofpacket
		.cp_channel              (cmd_mux_005_src_channel),                                              //                .channel
		.rf_sink_ready           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_005_out_0_ready),                                    // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_005_out_0_valid),                                    //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_005_out_0_data),                                     //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_005_out_0_error),                                    //                .error
		.rdata_fifo_src_ready    (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                  //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo (
		.clk               (u_spi_clk_out_clk_clk),                                                //       clk.clk
		.reset             (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
		.in_data           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                // (terminated)
		.csr_read          (1'b0),                                                                 // (terminated)
		.csr_write         (1'b0),                                                                 // (terminated)
		.csr_readdata      (),                                                                     // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                 // (terminated)
		.almost_full_data  (),                                                                     // (terminated)
		.almost_empty_data (),                                                                     // (terminated)
		.in_empty          (1'b0),                                                                 // (terminated)
		.out_empty         (),                                                                     // (terminated)
		.in_error          (1'b0),                                                                 // (terminated)
		.out_error         (),                                                                     // (terminated)
		.in_channel        (1'b0),                                                                 // (terminated)
		.out_channel       ()                                                                      // (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (34),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (0),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (0),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo (
		.clk               (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset             (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_data),    //        in.data
		.in_valid          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_valid),   //          .valid
		.in_ready          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_src_ready),   //          .ready
		.out_data          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_data),    //       out.data
		.out_valid         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_valid),   //          .valid
		.out_ready         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_ready),   //          .ready
		.csr_address       (2'b00),                                                            // (terminated)
		.csr_read          (1'b0),                                                             // (terminated)
		.csr_write         (1'b0),                                                             // (terminated)
		.csr_readdata      (),                                                                 // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated)
		.almost_full_data  (),                                                                 // (terminated)
		.almost_empty_data (),                                                                 // (terminated)
		.in_startofpacket  (1'b0),                                                             // (terminated)
		.in_endofpacket    (1'b0),                                                             // (terminated)
		.out_startofpacket (),                                                                 // (terminated)
		.out_endofpacket   (),                                                                 // (terminated)
		.in_empty          (1'b0),                                                             // (terminated)
		.out_empty         (),                                                                 // (terminated)
		.in_error          (1'b0),                                                             // (terminated)
		.out_error         (),                                                                 // (terminated)
		.in_channel        (1'b0),                                                             // (terminated)
		.out_channel       ()                                                                  // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_relay3_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                      //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
		.m0_address              (u_relay3_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_relay3_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_relay3_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_relay3_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_relay3_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_relay3_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_relay3_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_relay3_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_relay3_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_relay3_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_relay3_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_relay3_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_relay3_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_relay3_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_relay3_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_relay3_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_006_src_ready),                                      //              cp.ready
		.cp_valid                (cmd_mux_006_src_valid),                                      //                .valid
		.cp_data                 (cmd_mux_006_src_data),                                       //                .data
		.cp_startofpacket        (cmd_mux_006_src_startofpacket),                              //                .startofpacket
		.cp_endofpacket          (cmd_mux_006_src_endofpacket),                                //                .endofpacket
		.cp_channel              (cmd_mux_006_src_channel),                                    //                .channel
		.rf_sink_ready           (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_relay3_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_relay3_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_relay3_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_relay3_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_relay3_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_006_out_0_ready),                          // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_006_out_0_valid),                          //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_006_out_0_data),                           //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_006_out_0_error),                          //                .error
		.rdata_fifo_src_ready    (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                      //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_relay3_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                      //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
		.in_data           (u_relay3_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_relay3_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_relay3_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_relay3_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_relay3_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_relay3_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                      // (terminated)
		.csr_read          (1'b0),                                                       // (terminated)
		.csr_write         (1'b0),                                                       // (terminated)
		.csr_readdata      (),                                                           // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                       // (terminated)
		.almost_full_data  (),                                                           // (terminated)
		.almost_empty_data (),                                                           // (terminated)
		.in_empty          (1'b0),                                                       // (terminated)
		.out_empty         (),                                                           // (terminated)
		.in_error          (1'b0),                                                       // (terminated)
		.out_error         (),                                                           // (terminated)
		.in_channel        (1'b0),                                                       // (terminated)
		.out_channel       ()                                                            // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_mailbox_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                       //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     //       clk_reset.reset
		.m0_address              (u_mailbox_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_mailbox_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_mailbox_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_mailbox_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_mailbox_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_mailbox_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_mailbox_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_mailbox_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_mailbox_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_mailbox_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_mailbox_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_mailbox_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_mailbox_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_mailbox_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_mailbox_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_mailbox_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_007_src_ready),                                       //              cp.ready
		.cp_valid                (cmd_mux_007_src_valid),                                       //                .valid
		.cp_data                 (cmd_mux_007_src_data),                                        //                .data
		.cp_startofpacket        (cmd_mux_007_src_startofpacket),                               //                .startofpacket
		.cp_endofpacket          (cmd_mux_007_src_endofpacket),                                 //                .endofpacket
		.cp_channel              (cmd_mux_007_src_channel),                                     //                .channel
		.rf_sink_ready           (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_mailbox_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_mailbox_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_mailbox_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_mailbox_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_mailbox_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_007_out_0_ready),                           // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_007_out_0_valid),                           //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_007_out_0_data),                            //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_007_out_0_error),                           //                .error
		.rdata_fifo_src_ready    (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                       //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                         //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_mailbox_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                       //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
		.in_data           (u_mailbox_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_mailbox_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_mailbox_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_mailbox_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_mailbox_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_mailbox_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                       // (terminated)
		.csr_read          (1'b0),                                                        // (terminated)
		.csr_write         (1'b0),                                                        // (terminated)
		.csr_readdata      (),                                                            // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                        // (terminated)
		.almost_full_data  (),                                                            // (terminated)
		.almost_empty_data (),                                                            // (terminated)
		.in_empty          (1'b0),                                                        // (terminated)
		.out_empty         (),                                                            // (terminated)
		.in_error          (1'b0),                                                        // (terminated)
		.out_error         (),                                                            // (terminated)
		.in_channel        (1'b0),                                                        // (terminated)
		.out_channel       ()                                                             // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_rfnvram_smbus_master_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                        //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),      //       clk_reset.reset
		.m0_address              (u_rfnvram_smbus_master_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_rfnvram_smbus_master_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_rfnvram_smbus_master_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_rfnvram_smbus_master_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_rfnvram_smbus_master_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_rfnvram_smbus_master_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_rfnvram_smbus_master_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_rfnvram_smbus_master_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_rfnvram_smbus_master_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_rfnvram_smbus_master_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_rfnvram_smbus_master_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_rfnvram_smbus_master_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_rfnvram_smbus_master_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_rfnvram_smbus_master_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_rfnvram_smbus_master_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_rfnvram_smbus_master_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_008_src_ready),                                        //              cp.ready
		.cp_valid                (cmd_mux_008_src_valid),                                        //                .valid
		.cp_data                 (cmd_mux_008_src_data),                                         //                .data
		.cp_startofpacket        (cmd_mux_008_src_startofpacket),                                //                .startofpacket
		.cp_endofpacket          (cmd_mux_008_src_endofpacket),                                  //                .endofpacket
		.cp_channel              (cmd_mux_008_src_channel),                                      //                .channel
		.rf_sink_ready           (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_rfnvram_smbus_master_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_rfnvram_smbus_master_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_rfnvram_smbus_master_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_rfnvram_smbus_master_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_rfnvram_smbus_master_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_008_out_0_ready),                            // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_008_out_0_valid),                            //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_008_out_0_data),                             //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_008_out_0_error),                            //                .error
		.rdata_fifo_src_ready    (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                        //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                          //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_rfnvram_smbus_master_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                        //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
		.in_data           (u_rfnvram_smbus_master_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_rfnvram_smbus_master_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_rfnvram_smbus_master_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_rfnvram_smbus_master_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_rfnvram_smbus_master_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_rfnvram_smbus_master_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                        // (terminated)
		.csr_read          (1'b0),                                                         // (terminated)
		.csr_write         (1'b0),                                                         // (terminated)
		.csr_readdata      (),                                                             // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                         // (terminated)
		.almost_full_data  (),                                                             // (terminated)
		.almost_empty_data (),                                                             // (terminated)
		.in_empty          (1'b0),                                                         // (terminated)
		.out_empty         (),                                                             // (terminated)
		.in_error          (1'b0),                                                         // (terminated)
		.out_error         (),                                                             // (terminated)
		.in_channel        (1'b0),                                                         // (terminated)
		.out_channel       ()                                                              // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_avmm_bridge_avmm_agent (
		.clk                     (u_spi_clk_out_clk_clk),                                            //             clk.clk
		.reset                   (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_spi_filter_avmm_bridge_avmm_agent_m0_address),                   //              m0.address
		.m0_burstcount           (u_spi_filter_avmm_bridge_avmm_agent_m0_burstcount),                //                .burstcount
		.m0_byteenable           (u_spi_filter_avmm_bridge_avmm_agent_m0_byteenable),                //                .byteenable
		.m0_debugaccess          (u_spi_filter_avmm_bridge_avmm_agent_m0_debugaccess),               //                .debugaccess
		.m0_lock                 (u_spi_filter_avmm_bridge_avmm_agent_m0_lock),                      //                .lock
		.m0_readdata             (u_spi_filter_avmm_bridge_avmm_agent_m0_readdata),                  //                .readdata
		.m0_readdatavalid        (u_spi_filter_avmm_bridge_avmm_agent_m0_readdatavalid),             //                .readdatavalid
		.m0_read                 (u_spi_filter_avmm_bridge_avmm_agent_m0_read),                      //                .read
		.m0_waitrequest          (u_spi_filter_avmm_bridge_avmm_agent_m0_waitrequest),               //                .waitrequest
		.m0_writedata            (u_spi_filter_avmm_bridge_avmm_agent_m0_writedata),                 //                .writedata
		.m0_write                (u_spi_filter_avmm_bridge_avmm_agent_m0_write),                     //                .write
		.rp_endofpacket          (u_spi_filter_avmm_bridge_avmm_agent_rp_endofpacket),               //              rp.endofpacket
		.rp_ready                (u_spi_filter_avmm_bridge_avmm_agent_rp_ready),                     //                .ready
		.rp_valid                (u_spi_filter_avmm_bridge_avmm_agent_rp_valid),                     //                .valid
		.rp_data                 (u_spi_filter_avmm_bridge_avmm_agent_rp_data),                      //                .data
		.rp_startofpacket        (u_spi_filter_avmm_bridge_avmm_agent_rp_startofpacket),             //                .startofpacket
		.cp_ready                (cmd_mux_009_src_ready),                                            //              cp.ready
		.cp_valid                (cmd_mux_009_src_valid),                                            //                .valid
		.cp_data                 (cmd_mux_009_src_data),                                             //                .data
		.cp_startofpacket        (cmd_mux_009_src_startofpacket),                                    //                .startofpacket
		.cp_endofpacket          (cmd_mux_009_src_endofpacket),                                      //                .endofpacket
		.cp_channel              (cmd_mux_009_src_channel),                                          //                .channel
		.rf_sink_ready           (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_ready),           //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_valid),           //                .valid
		.rf_sink_startofpacket   (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket),   //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),     //                .endofpacket
		.rf_sink_data            (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_data),            //                .data
		.rf_source_ready         (u_spi_filter_avmm_bridge_avmm_agent_rf_source_ready),              //       rf_source.ready
		.rf_source_valid         (u_spi_filter_avmm_bridge_avmm_agent_rf_source_valid),              //                .valid
		.rf_source_startofpacket (u_spi_filter_avmm_bridge_avmm_agent_rf_source_startofpacket),      //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_avmm_bridge_avmm_agent_rf_source_endofpacket),        //                .endofpacket
		.rf_source_data          (u_spi_filter_avmm_bridge_avmm_agent_rf_source_data),               //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_009_out_0_ready),                                // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_009_out_0_valid),                                //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_009_out_0_data),                                 //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_009_out_0_error),                                //                .error
		.rdata_fifo_src_ready    (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_ready),         //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_valid),         //                .valid
		.rdata_fifo_src_data     (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_data),          //                .data
		.m0_response             (2'b00),                                                            //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                              //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset             (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_spi_filter_avmm_bridge_avmm_agent_rf_source_data),               //        in.data
		.in_valid          (u_spi_filter_avmm_bridge_avmm_agent_rf_source_valid),              //          .valid
		.in_ready          (u_spi_filter_avmm_bridge_avmm_agent_rf_source_ready),              //          .ready
		.in_startofpacket  (u_spi_filter_avmm_bridge_avmm_agent_rf_source_startofpacket),      //          .startofpacket
		.in_endofpacket    (u_spi_filter_avmm_bridge_avmm_agent_rf_source_endofpacket),        //          .endofpacket
		.out_data          (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_data),            //       out.data
		.out_valid         (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_valid),           //          .valid
		.out_ready         (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_ready),           //          .ready
		.out_startofpacket (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket),   //          .startofpacket
		.out_endofpacket   (u_spi_filter_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),     //          .endofpacket
		.csr_address       (2'b00),                                                            // (terminated)
		.csr_read          (1'b0),                                                             // (terminated)
		.csr_write         (1'b0),                                                             // (terminated)
		.csr_readdata      (),                                                                 // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated)
		.almost_full_data  (),                                                                 // (terminated)
		.almost_empty_data (),                                                                 // (terminated)
		.in_empty          (1'b0),                                                             // (terminated)
		.out_empty         (),                                                                 // (terminated)
		.in_error          (1'b0),                                                             // (terminated)
		.out_error         (),                                                                 // (terminated)
		.in_channel        (1'b0),                                                             // (terminated)
		.out_channel       ()                                                                  // (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (34),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (0),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (0),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo (
		.clk               (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset             (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_data),          //        in.data
		.in_valid          (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_valid),         //          .valid
		.in_ready          (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_src_ready),         //          .ready
		.out_data          (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_ready),         //          .ready
		.csr_address       (2'b00),                                                            // (terminated)
		.csr_read          (1'b0),                                                             // (terminated)
		.csr_write         (1'b0),                                                             // (terminated)
		.csr_readdata      (),                                                                 // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated)
		.almost_full_data  (),                                                                 // (terminated)
		.almost_empty_data (),                                                                 // (terminated)
		.in_startofpacket  (1'b0),                                                             // (terminated)
		.in_endofpacket    (1'b0),                                                             // (terminated)
		.out_startofpacket (),                                                                 // (terminated)
		.out_endofpacket   (),                                                                 // (terminated)
		.in_empty          (1'b0),                                                             // (terminated)
		.out_empty         (),                                                                 // (terminated)
		.in_error          (1'b0),                                                             // (terminated)
		.out_error         (),                                                                 // (terminated)
		.in_channel        (1'b0),                                                             // (terminated)
		.out_channel       ()                                                                  // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_timer_bank_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                          //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),        //       clk_reset.reset
		.m0_address              (u_timer_bank_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_timer_bank_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_timer_bank_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_timer_bank_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_timer_bank_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_timer_bank_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_timer_bank_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_timer_bank_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_timer_bank_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_timer_bank_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_timer_bank_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_timer_bank_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_timer_bank_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_timer_bank_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_timer_bank_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_timer_bank_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_010_src_ready),                                          //              cp.ready
		.cp_valid                (cmd_mux_010_src_valid),                                          //                .valid
		.cp_data                 (cmd_mux_010_src_data),                                           //                .data
		.cp_startofpacket        (cmd_mux_010_src_startofpacket),                                  //                .startofpacket
		.cp_endofpacket          (cmd_mux_010_src_endofpacket),                                    //                .endofpacket
		.cp_channel              (cmd_mux_010_src_channel),                                        //                .channel
		.rf_sink_ready           (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_timer_bank_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_timer_bank_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_timer_bank_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_timer_bank_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_timer_bank_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_010_out_0_ready),                              // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_010_out_0_valid),                              //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_010_out_0_data),                               //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_010_out_0_error),                              //                .error
		.rdata_fifo_src_ready    (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                          //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                            //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                          //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),        // clk_reset.reset
		.in_data           (u_timer_bank_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_timer_bank_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_timer_bank_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_timer_bank_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_timer_bank_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_timer_bank_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                          // (terminated)
		.csr_read          (1'b0),                                                           // (terminated)
		.csr_write         (1'b0),                                                           // (terminated)
		.csr_readdata      (),                                                               // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                           // (terminated)
		.almost_full_data  (),                                                               // (terminated)
		.almost_empty_data (),                                                               // (terminated)
		.in_empty          (1'b0),                                                           // (terminated)
		.out_empty         (),                                                               // (terminated)
		.in_error          (1'b0),                                                           // (terminated)
		.out_error         (),                                                               // (terminated)
		.in_channel        (1'b0),                                                           // (terminated)
		.out_channel       ()                                                                // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_crypto_dma_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                          //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),        //       clk_reset.reset
		.m0_address              (u_crypto_dma_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_crypto_dma_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_crypto_dma_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_crypto_dma_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_crypto_dma_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_crypto_dma_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_crypto_dma_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_crypto_dma_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_crypto_dma_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_crypto_dma_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_crypto_dma_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_crypto_dma_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_crypto_dma_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_crypto_dma_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_crypto_dma_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_crypto_dma_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_011_src_ready),                                          //              cp.ready
		.cp_valid                (cmd_mux_011_src_valid),                                          //                .valid
		.cp_data                 (cmd_mux_011_src_data),                                           //                .data
		.cp_startofpacket        (cmd_mux_011_src_startofpacket),                                  //                .startofpacket
		.cp_endofpacket          (cmd_mux_011_src_endofpacket),                                    //                .endofpacket
		.cp_channel              (cmd_mux_011_src_channel),                                        //                .channel
		.rf_sink_ready           (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_011_out_0_ready),                              // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_011_out_0_valid),                              //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_011_out_0_data),                               //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_011_out_0_error),                              //                .error
		.rdata_fifo_src_ready    (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                          //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                            //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                          //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),        // clk_reset.reset
		.in_data           (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_crypto_dma_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_crypto_dma_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                          // (terminated)
		.csr_read          (1'b0),                                                           // (terminated)
		.csr_write         (1'b0),                                                           // (terminated)
		.csr_readdata      (),                                                               // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                           // (terminated)
		.almost_full_data  (),                                                               // (terminated)
		.almost_empty_data (),                                                               // (terminated)
		.in_empty          (1'b0),                                                           // (terminated)
		.out_empty         (),                                                               // (terminated)
		.in_error          (1'b0),                                                           // (terminated)
		.out_error         (),                                                               // (terminated)
		.in_channel        (1'b0),                                                           // (terminated)
		.out_channel       ()                                                                // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_crypto_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                      //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
		.m0_address              (u_crypto_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_crypto_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_crypto_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_crypto_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_crypto_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_crypto_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_crypto_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_crypto_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_crypto_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_crypto_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_crypto_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_crypto_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_crypto_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_crypto_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_crypto_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_crypto_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_012_src_ready),                                      //              cp.ready
		.cp_valid                (cmd_mux_012_src_valid),                                      //                .valid
		.cp_data                 (cmd_mux_012_src_data),                                       //                .data
		.cp_startofpacket        (cmd_mux_012_src_startofpacket),                              //                .startofpacket
		.cp_endofpacket          (cmd_mux_012_src_endofpacket),                                //                .endofpacket
		.cp_channel              (cmd_mux_012_src_channel),                                    //                .channel
		.rf_sink_ready           (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_crypto_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_crypto_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_crypto_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_crypto_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_crypto_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_012_out_0_ready),                          // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_012_out_0_valid),                          //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_012_out_0_data),                           //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_012_out_0_error),                          //                .error
		.rdata_fifo_src_ready    (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                      //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_crypto_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                      //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
		.in_data           (u_crypto_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_crypto_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_crypto_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_crypto_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_crypto_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_crypto_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                      // (terminated)
		.csr_read          (1'b0),                                                       // (terminated)
		.csr_write         (1'b0),                                                       // (terminated)
		.csr_readdata      (),                                                           // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                       // (terminated)
		.almost_full_data  (),                                                           // (terminated)
		.almost_empty_data (),                                                           // (terminated)
		.in_empty          (1'b0),                                                       // (terminated)
		.out_empty         (),                                                           // (terminated)
		.in_error          (1'b0),                                                       // (terminated)
		.out_error         (),                                                           // (terminated)
		.in_channel        (1'b0),                                                       // (terminated)
		.out_channel       ()                                                            // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_bmc_we_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                                 //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),               //       clk_reset.reset
		.m0_address              (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_013_src_ready),                                                 //              cp.ready
		.cp_valid                (cmd_mux_013_src_valid),                                                 //                .valid
		.cp_data                 (cmd_mux_013_src_data),                                                  //                .data
		.cp_startofpacket        (cmd_mux_013_src_startofpacket),                                         //                .startofpacket
		.cp_endofpacket          (cmd_mux_013_src_endofpacket),                                           //                .endofpacket
		.cp_channel              (cmd_mux_013_src_channel),                                               //                .channel
		.rf_sink_ready           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_013_out_0_ready),                                     // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_013_out_0_valid),                                     //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_013_out_0_data),                                      //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_013_out_0_error),                                     //                .error
		.rdata_fifo_src_ready    (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                 //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                   //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                                 //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),               // clk_reset.reset
		.in_data           (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                 // (terminated)
		.csr_read          (1'b0),                                                                  // (terminated)
		.csr_write         (1'b0),                                                                  // (terminated)
		.csr_readdata      (),                                                                      // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                  // (terminated)
		.almost_full_data  (),                                                                      // (terminated)
		.almost_empty_data (),                                                                      // (terminated)
		.in_empty          (1'b0),                                                                  // (terminated)
		.out_empty         (),                                                                      // (terminated)
		.in_error          (1'b0),                                                                  // (terminated)
		.out_error         (),                                                                      // (terminated)
		.in_channel        (1'b0),                                                                  // (terminated)
		.out_channel       ()                                                                       // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                                         //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       //       clk_reset.reset
		.m0_address              (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_014_src_ready),                                                         //              cp.ready
		.cp_valid                (cmd_mux_014_src_valid),                                                         //                .valid
		.cp_data                 (cmd_mux_014_src_data),                                                          //                .data
		.cp_startofpacket        (cmd_mux_014_src_startofpacket),                                                 //                .startofpacket
		.cp_endofpacket          (cmd_mux_014_src_endofpacket),                                                   //                .endofpacket
		.cp_channel              (cmd_mux_014_src_channel),                                                       //                .channel
		.rf_sink_ready           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_014_out_0_ready),                                             // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_014_out_0_valid),                                             //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_014_out_0_data),                                              //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_014_out_0_error),                                             //                .error
		.rdata_fifo_src_ready    (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                         //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                           //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                                         //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       // clk_reset.reset
		.in_data           (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                         // (terminated)
		.csr_read          (1'b0),                                                                          // (terminated)
		.csr_write         (1'b0),                                                                          // (terminated)
		.csr_readdata      (),                                                                              // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                          // (terminated)
		.almost_full_data  (),                                                                              // (terminated)
		.almost_empty_data (),                                                                              // (terminated)
		.in_empty          (1'b0),                                                                          // (terminated)
		.out_empty         (),                                                                              // (terminated)
		.in_error          (1'b0),                                                                          // (terminated)
		.out_error         (),                                                                              // (terminated)
		.in_channel        (1'b0),                                                                          // (terminated)
		.out_channel       ()                                                                               // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_i3c_avmm_bridge_avmm_agent (
		.clk                     (u_i3c_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset),     //       clk_reset.reset
		.m0_address              (u_i3c_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_i3c_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_i3c_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_i3c_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_i3c_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_i3c_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_i3c_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_i3c_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_i3c_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_i3c_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_i3c_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_i3c_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_i3c_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_i3c_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_i3c_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_i3c_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_015_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_015_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_015_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_015_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_015_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_015_src_channel),                                 //                .channel
		.rf_sink_ready           (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_i3c_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_i3c_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_i3c_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_i3c_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_i3c_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_015_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_015_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_015_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_015_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_i3c_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_i3c_clk_out_clk_clk),                                   //       clk.clk
		.reset             (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
		.in_data           (u_i3c_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_i3c_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_i3c_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_i3c_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_i3c_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_i3c_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (34),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (0),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (0),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_i3c_avmm_bridge_avmm_agent_rdata_fifo (
		.clk               (u_i3c_clk_out_clk_clk),                               //       clk.clk
		.reset             (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_data),    //        in.data
		.in_valid          (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_valid),   //          .valid
		.in_ready          (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_src_ready),   //          .ready
		.out_data          (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_data),    //       out.data
		.out_valid         (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_valid),   //          .valid
		.out_ready         (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_ready),   //          .ready
		.csr_address       (2'b00),                                               // (terminated)
		.csr_read          (1'b0),                                                // (terminated)
		.csr_write         (1'b0),                                                // (terminated)
		.csr_readdata      (),                                                    // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                // (terminated)
		.almost_full_data  (),                                                    // (terminated)
		.almost_empty_data (),                                                    // (terminated)
		.in_startofpacket  (1'b0),                                                // (terminated)
		.in_endofpacket    (1'b0),                                                // (terminated)
		.out_startofpacket (),                                                    // (terminated)
		.out_endofpacket   (),                                                    // (terminated)
		.in_empty          (1'b0),                                                // (terminated)
		.out_empty         (),                                                    // (terminated)
		.in_error          (1'b0),                                                // (terminated)
		.out_error         (),                                                    // (terminated)
		.in_channel        (1'b0),                                                // (terminated)
		.out_channel       ()                                                     // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                                         //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       //       clk_reset.reset
		.m0_address              (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_016_src_ready),                                                         //              cp.ready
		.cp_valid                (cmd_mux_016_src_valid),                                                         //                .valid
		.cp_data                 (cmd_mux_016_src_data),                                                          //                .data
		.cp_startofpacket        (cmd_mux_016_src_startofpacket),                                                 //                .startofpacket
		.cp_endofpacket          (cmd_mux_016_src_endofpacket),                                                   //                .endofpacket
		.cp_channel              (cmd_mux_016_src_channel),                                                       //                .channel
		.rf_sink_ready           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_016_out_0_ready),                                             // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_016_out_0_valid),                                             //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_016_out_0_data),                                              //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_016_out_0_error),                                             //                .error
		.rdata_fifo_src_ready    (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                         //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                           //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                                         //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       // clk_reset.reset
		.in_data           (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                         // (terminated)
		.csr_read          (1'b0),                                                                          // (terminated)
		.csr_write         (1'b0),                                                                          // (terminated)
		.csr_readdata      (),                                                                              // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                          // (terminated)
		.almost_full_data  (),                                                                              // (terminated)
		.almost_empty_data (),                                                                              // (terminated)
		.in_empty          (1'b0),                                                                          // (terminated)
		.out_empty         (),                                                                              // (terminated)
		.in_error          (1'b0),                                                                          // (terminated)
		.out_error         (),                                                                              // (terminated)
		.in_channel        (1'b0),                                                                          // (terminated)
		.out_channel       ()                                                                               // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                                         //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       //       clk_reset.reset
		.m0_address              (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_017_src_ready),                                                         //              cp.ready
		.cp_valid                (cmd_mux_017_src_valid),                                                         //                .valid
		.cp_data                 (cmd_mux_017_src_data),                                                          //                .data
		.cp_startofpacket        (cmd_mux_017_src_startofpacket),                                                 //                .startofpacket
		.cp_endofpacket          (cmd_mux_017_src_endofpacket),                                                   //                .endofpacket
		.cp_channel              (cmd_mux_017_src_channel),                                                       //                .channel
		.rf_sink_ready           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_017_out_0_ready),                                             // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_017_out_0_valid),                                             //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_017_out_0_data),                                              //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_017_out_0_error),                                             //                .error
		.rdata_fifo_src_ready    (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                         //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                           //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                                         //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       // clk_reset.reset
		.in_data           (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                         // (terminated)
		.csr_read          (1'b0),                                                                          // (terminated)
		.csr_write         (1'b0),                                                                          // (terminated)
		.csr_readdata      (),                                                                              // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                          // (terminated)
		.almost_full_data  (),                                                                              // (terminated)
		.almost_empty_data (),                                                                              // (terminated)
		.in_empty          (1'b0),                                                                          // (terminated)
		.out_empty         (),                                                                              // (terminated)
		.in_error          (1'b0),                                                                          // (terminated)
		.out_error         (),                                                                              // (terminated)
		.in_channel        (1'b0),                                                                          // (terminated)
		.out_channel       ()                                                                               // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                                         //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       //       clk_reset.reset
		.m0_address              (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_018_src_ready),                                                         //              cp.ready
		.cp_valid                (cmd_mux_018_src_valid),                                                         //                .valid
		.cp_data                 (cmd_mux_018_src_data),                                                          //                .data
		.cp_startofpacket        (cmd_mux_018_src_startofpacket),                                                 //                .startofpacket
		.cp_endofpacket          (cmd_mux_018_src_endofpacket),                                                   //                .endofpacket
		.cp_channel              (cmd_mux_018_src_channel),                                                       //                .channel
		.rf_sink_ready           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_018_out_0_ready),                                             // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_018_out_0_valid),                                             //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_018_out_0_data),                                              //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_018_out_0_error),                                             //                .error
		.rdata_fifo_src_ready    (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                                         //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                                           //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                                         //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                       // clk_reset.reset
		.in_data           (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                                         // (terminated)
		.csr_read          (1'b0),                                                                          // (terminated)
		.csr_write         (1'b0),                                                                          // (terminated)
		.csr_readdata      (),                                                                              // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                                          // (terminated)
		.almost_full_data  (),                                                                              // (terminated)
		.almost_empty_data (),                                                                              // (terminated)
		.in_empty          (1'b0),                                                                          // (terminated)
		.out_empty         (),                                                                              // (terminated)
		.in_error          (1'b0),                                                                          // (terminated)
		.out_error         (),                                                                              // (terminated)
		.in_channel        (1'b0),                                                                          // (terminated)
		.out_channel       ()                                                                               // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_relay2_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                      //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
		.m0_address              (u_relay2_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_relay2_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_relay2_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_relay2_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_relay2_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_relay2_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_relay2_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_relay2_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_relay2_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_relay2_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_relay2_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_relay2_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_relay2_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_relay2_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_relay2_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_relay2_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_019_src_ready),                                      //              cp.ready
		.cp_valid                (cmd_mux_019_src_valid),                                      //                .valid
		.cp_data                 (cmd_mux_019_src_data),                                       //                .data
		.cp_startofpacket        (cmd_mux_019_src_startofpacket),                              //                .startofpacket
		.cp_endofpacket          (cmd_mux_019_src_endofpacket),                                //                .endofpacket
		.cp_channel              (cmd_mux_019_src_channel),                                    //                .channel
		.rf_sink_ready           (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_relay2_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_relay2_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_relay2_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_relay2_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_relay2_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_019_out_0_ready),                          // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_019_out_0_valid),                          //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_019_out_0_data),                           //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_019_out_0_error),                          //                .error
		.rdata_fifo_src_ready    (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                      //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_relay2_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                      //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
		.in_data           (u_relay2_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_relay2_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_relay2_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_relay2_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_relay2_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_relay2_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                      // (terminated)
		.csr_read          (1'b0),                                                       // (terminated)
		.csr_write         (1'b0),                                                       // (terminated)
		.csr_readdata      (),                                                           // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                       // (terminated)
		.almost_full_data  (),                                                           // (terminated)
		.almost_empty_data (),                                                           // (terminated)
		.in_empty          (1'b0),                                                       // (terminated)
		.out_empty         (),                                                           // (terminated)
		.in_error          (1'b0),                                                       // (terminated)
		.out_error         (),                                                           // (terminated)
		.in_channel        (1'b0),                                                       // (terminated)
		.out_channel       ()                                                            // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_aes_avmm_bridge_avmm_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_aes_avmm_bridge_avmm_agent_m0_address),                 //              m0.address
		.m0_burstcount           (u_aes_avmm_bridge_avmm_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (u_aes_avmm_bridge_avmm_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (u_aes_avmm_bridge_avmm_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (u_aes_avmm_bridge_avmm_agent_m0_lock),                    //                .lock
		.m0_readdata             (u_aes_avmm_bridge_avmm_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (u_aes_avmm_bridge_avmm_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (u_aes_avmm_bridge_avmm_agent_m0_read),                    //                .read
		.m0_waitrequest          (u_aes_avmm_bridge_avmm_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (u_aes_avmm_bridge_avmm_agent_m0_writedata),               //                .writedata
		.m0_write                (u_aes_avmm_bridge_avmm_agent_m0_write),                   //                .write
		.rp_endofpacket          (u_aes_avmm_bridge_avmm_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (u_aes_avmm_bridge_avmm_agent_rp_ready),                   //                .ready
		.rp_valid                (u_aes_avmm_bridge_avmm_agent_rp_valid),                   //                .valid
		.rp_data                 (u_aes_avmm_bridge_avmm_agent_rp_data),                    //                .data
		.rp_startofpacket        (u_aes_avmm_bridge_avmm_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_020_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_020_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_020_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_020_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_020_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_020_src_channel),                                 //                .channel
		.rf_sink_ready           (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (u_aes_avmm_bridge_avmm_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (u_aes_avmm_bridge_avmm_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (u_aes_avmm_bridge_avmm_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (u_aes_avmm_bridge_avmm_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (u_aes_avmm_bridge_avmm_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_020_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_020_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_020_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_020_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_aes_avmm_bridge_avmm_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_aes_avmm_bridge_avmm_agent_rf_source_data),             //        in.data
		.in_valid          (u_aes_avmm_bridge_avmm_agent_rf_source_valid),            //          .valid
		.in_ready          (u_aes_avmm_bridge_avmm_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (u_aes_avmm_bridge_avmm_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (u_aes_avmm_bridge_avmm_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (u_aes_avmm_bridge_avmm_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_ufm_csr_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_ufm_csr_agent_m0_address),                              //              m0.address
		.m0_burstcount           (u_ufm_csr_agent_m0_burstcount),                           //                .burstcount
		.m0_byteenable           (u_ufm_csr_agent_m0_byteenable),                           //                .byteenable
		.m0_debugaccess          (u_ufm_csr_agent_m0_debugaccess),                          //                .debugaccess
		.m0_lock                 (u_ufm_csr_agent_m0_lock),                                 //                .lock
		.m0_readdata             (u_ufm_csr_agent_m0_readdata),                             //                .readdata
		.m0_readdatavalid        (u_ufm_csr_agent_m0_readdatavalid),                        //                .readdatavalid
		.m0_read                 (u_ufm_csr_agent_m0_read),                                 //                .read
		.m0_waitrequest          (u_ufm_csr_agent_m0_waitrequest),                          //                .waitrequest
		.m0_writedata            (u_ufm_csr_agent_m0_writedata),                            //                .writedata
		.m0_write                (u_ufm_csr_agent_m0_write),                                //                .write
		.rp_endofpacket          (u_ufm_csr_agent_rp_endofpacket),                          //              rp.endofpacket
		.rp_ready                (u_ufm_csr_agent_rp_ready),                                //                .ready
		.rp_valid                (u_ufm_csr_agent_rp_valid),                                //                .valid
		.rp_data                 (u_ufm_csr_agent_rp_data),                                 //                .data
		.rp_startofpacket        (u_ufm_csr_agent_rp_startofpacket),                        //                .startofpacket
		.cp_ready                (cmd_mux_021_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_021_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_021_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_021_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_021_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_021_src_channel),                                 //                .channel
		.rf_sink_ready           (u_ufm_csr_agent_rsp_fifo_out_ready),                      //         rf_sink.ready
		.rf_sink_valid           (u_ufm_csr_agent_rsp_fifo_out_valid),                      //                .valid
		.rf_sink_startofpacket   (u_ufm_csr_agent_rsp_fifo_out_startofpacket),              //                .startofpacket
		.rf_sink_endofpacket     (u_ufm_csr_agent_rsp_fifo_out_endofpacket),                //                .endofpacket
		.rf_sink_data            (u_ufm_csr_agent_rsp_fifo_out_data),                       //                .data
		.rf_source_ready         (u_ufm_csr_agent_rf_source_ready),                         //       rf_source.ready
		.rf_source_valid         (u_ufm_csr_agent_rf_source_valid),                         //                .valid
		.rf_source_startofpacket (u_ufm_csr_agent_rf_source_startofpacket),                 //                .startofpacket
		.rf_source_endofpacket   (u_ufm_csr_agent_rf_source_endofpacket),                   //                .endofpacket
		.rf_source_data          (u_ufm_csr_agent_rf_source_data),                          //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_021_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_021_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_021_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_021_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_ufm_csr_agent_rdata_fifo_src_ready),                    //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_ufm_csr_agent_rdata_fifo_src_valid),                    //                .valid
		.rdata_fifo_src_data     (u_ufm_csr_agent_rdata_fifo_src_data),                     //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_ufm_csr_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_ufm_csr_agent_rf_source_data),                          //        in.data
		.in_valid          (u_ufm_csr_agent_rf_source_valid),                         //          .valid
		.in_ready          (u_ufm_csr_agent_rf_source_ready),                         //          .ready
		.in_startofpacket  (u_ufm_csr_agent_rf_source_startofpacket),                 //          .startofpacket
		.in_endofpacket    (u_ufm_csr_agent_rf_source_endofpacket),                   //          .endofpacket
		.out_data          (u_ufm_csr_agent_rsp_fifo_out_data),                       //       out.data
		.out_valid         (u_ufm_csr_agent_rsp_fifo_out_valid),                      //          .valid
		.out_ready         (u_ufm_csr_agent_rsp_fifo_out_ready),                      //          .ready
		.out_startofpacket (u_ufm_csr_agent_rsp_fifo_out_startofpacket),              //          .startofpacket
		.out_endofpacket   (u_ufm_csr_agent_rsp_fifo_out_endofpacket),                //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_global_state_reg_s1_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_global_state_reg_s1_agent_m0_address),                  //              m0.address
		.m0_burstcount           (u_global_state_reg_s1_agent_m0_burstcount),               //                .burstcount
		.m0_byteenable           (u_global_state_reg_s1_agent_m0_byteenable),               //                .byteenable
		.m0_debugaccess          (u_global_state_reg_s1_agent_m0_debugaccess),              //                .debugaccess
		.m0_lock                 (u_global_state_reg_s1_agent_m0_lock),                     //                .lock
		.m0_readdata             (u_global_state_reg_s1_agent_m0_readdata),                 //                .readdata
		.m0_readdatavalid        (u_global_state_reg_s1_agent_m0_readdatavalid),            //                .readdatavalid
		.m0_read                 (u_global_state_reg_s1_agent_m0_read),                     //                .read
		.m0_waitrequest          (u_global_state_reg_s1_agent_m0_waitrequest),              //                .waitrequest
		.m0_writedata            (u_global_state_reg_s1_agent_m0_writedata),                //                .writedata
		.m0_write                (u_global_state_reg_s1_agent_m0_write),                    //                .write
		.rp_endofpacket          (u_global_state_reg_s1_agent_rp_endofpacket),              //              rp.endofpacket
		.rp_ready                (u_global_state_reg_s1_agent_rp_ready),                    //                .ready
		.rp_valid                (u_global_state_reg_s1_agent_rp_valid),                    //                .valid
		.rp_data                 (u_global_state_reg_s1_agent_rp_data),                     //                .data
		.rp_startofpacket        (u_global_state_reg_s1_agent_rp_startofpacket),            //                .startofpacket
		.cp_ready                (cmd_mux_022_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_022_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_022_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_022_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_022_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_022_src_channel),                                 //                .channel
		.rf_sink_ready           (u_global_state_reg_s1_agent_rsp_fifo_out_ready),          //         rf_sink.ready
		.rf_sink_valid           (u_global_state_reg_s1_agent_rsp_fifo_out_valid),          //                .valid
		.rf_sink_startofpacket   (u_global_state_reg_s1_agent_rsp_fifo_out_startofpacket),  //                .startofpacket
		.rf_sink_endofpacket     (u_global_state_reg_s1_agent_rsp_fifo_out_endofpacket),    //                .endofpacket
		.rf_sink_data            (u_global_state_reg_s1_agent_rsp_fifo_out_data),           //                .data
		.rf_source_ready         (u_global_state_reg_s1_agent_rf_source_ready),             //       rf_source.ready
		.rf_source_valid         (u_global_state_reg_s1_agent_rf_source_valid),             //                .valid
		.rf_source_startofpacket (u_global_state_reg_s1_agent_rf_source_startofpacket),     //                .startofpacket
		.rf_source_endofpacket   (u_global_state_reg_s1_agent_rf_source_endofpacket),       //                .endofpacket
		.rf_source_data          (u_global_state_reg_s1_agent_rf_source_data),              //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_022_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_022_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_022_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_022_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_global_state_reg_s1_agent_rdata_fifo_src_ready),        //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_global_state_reg_s1_agent_rdata_fifo_src_valid),        //                .valid
		.rdata_fifo_src_data     (u_global_state_reg_s1_agent_rdata_fifo_src_data),         //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_global_state_reg_s1_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_global_state_reg_s1_agent_rf_source_data),              //        in.data
		.in_valid          (u_global_state_reg_s1_agent_rf_source_valid),             //          .valid
		.in_ready          (u_global_state_reg_s1_agent_rf_source_ready),             //          .ready
		.in_startofpacket  (u_global_state_reg_s1_agent_rf_source_startofpacket),     //          .startofpacket
		.in_endofpacket    (u_global_state_reg_s1_agent_rf_source_endofpacket),       //          .endofpacket
		.out_data          (u_global_state_reg_s1_agent_rsp_fifo_out_data),           //       out.data
		.out_valid         (u_global_state_reg_s1_agent_rsp_fifo_out_valid),          //          .valid
		.out_ready         (u_global_state_reg_s1_agent_rsp_fifo_out_ready),          //          .ready
		.out_startofpacket (u_global_state_reg_s1_agent_rsp_fifo_out_startofpacket),  //          .startofpacket
		.out_endofpacket   (u_global_state_reg_s1_agent_rsp_fifo_out_endofpacket),    //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_gpo_1_s1_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_gpo_1_s1_agent_m0_address),                             //              m0.address
		.m0_burstcount           (u_gpo_1_s1_agent_m0_burstcount),                          //                .burstcount
		.m0_byteenable           (u_gpo_1_s1_agent_m0_byteenable),                          //                .byteenable
		.m0_debugaccess          (u_gpo_1_s1_agent_m0_debugaccess),                         //                .debugaccess
		.m0_lock                 (u_gpo_1_s1_agent_m0_lock),                                //                .lock
		.m0_readdata             (u_gpo_1_s1_agent_m0_readdata),                            //                .readdata
		.m0_readdatavalid        (u_gpo_1_s1_agent_m0_readdatavalid),                       //                .readdatavalid
		.m0_read                 (u_gpo_1_s1_agent_m0_read),                                //                .read
		.m0_waitrequest          (u_gpo_1_s1_agent_m0_waitrequest),                         //                .waitrequest
		.m0_writedata            (u_gpo_1_s1_agent_m0_writedata),                           //                .writedata
		.m0_write                (u_gpo_1_s1_agent_m0_write),                               //                .write
		.rp_endofpacket          (u_gpo_1_s1_agent_rp_endofpacket),                         //              rp.endofpacket
		.rp_ready                (u_gpo_1_s1_agent_rp_ready),                               //                .ready
		.rp_valid                (u_gpo_1_s1_agent_rp_valid),                               //                .valid
		.rp_data                 (u_gpo_1_s1_agent_rp_data),                                //                .data
		.rp_startofpacket        (u_gpo_1_s1_agent_rp_startofpacket),                       //                .startofpacket
		.cp_ready                (cmd_mux_023_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_023_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_023_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_023_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_023_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_023_src_channel),                                 //                .channel
		.rf_sink_ready           (u_gpo_1_s1_agent_rsp_fifo_out_ready),                     //         rf_sink.ready
		.rf_sink_valid           (u_gpo_1_s1_agent_rsp_fifo_out_valid),                     //                .valid
		.rf_sink_startofpacket   (u_gpo_1_s1_agent_rsp_fifo_out_startofpacket),             //                .startofpacket
		.rf_sink_endofpacket     (u_gpo_1_s1_agent_rsp_fifo_out_endofpacket),               //                .endofpacket
		.rf_sink_data            (u_gpo_1_s1_agent_rsp_fifo_out_data),                      //                .data
		.rf_source_ready         (u_gpo_1_s1_agent_rf_source_ready),                        //       rf_source.ready
		.rf_source_valid         (u_gpo_1_s1_agent_rf_source_valid),                        //                .valid
		.rf_source_startofpacket (u_gpo_1_s1_agent_rf_source_startofpacket),                //                .startofpacket
		.rf_source_endofpacket   (u_gpo_1_s1_agent_rf_source_endofpacket),                  //                .endofpacket
		.rf_source_data          (u_gpo_1_s1_agent_rf_source_data),                         //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_023_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_023_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_023_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_023_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_gpo_1_s1_agent_rdata_fifo_src_ready),                   //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_gpo_1_s1_agent_rdata_fifo_src_valid),                   //                .valid
		.rdata_fifo_src_data     (u_gpo_1_s1_agent_rdata_fifo_src_data),                    //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_gpo_1_s1_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_gpo_1_s1_agent_rf_source_data),                         //        in.data
		.in_valid          (u_gpo_1_s1_agent_rf_source_valid),                        //          .valid
		.in_ready          (u_gpo_1_s1_agent_rf_source_ready),                        //          .ready
		.in_startofpacket  (u_gpo_1_s1_agent_rf_source_startofpacket),                //          .startofpacket
		.in_endofpacket    (u_gpo_1_s1_agent_rf_source_endofpacket),                  //          .endofpacket
		.out_data          (u_gpo_1_s1_agent_rsp_fifo_out_data),                      //       out.data
		.out_valid         (u_gpo_1_s1_agent_rsp_fifo_out_valid),                     //          .valid
		.out_ready         (u_gpo_1_s1_agent_rsp_fifo_out_ready),                     //          .ready
		.out_startofpacket (u_gpo_1_s1_agent_rsp_fifo_out_startofpacket),             //          .startofpacket
		.out_endofpacket   (u_gpo_1_s1_agent_rsp_fifo_out_endofpacket),               //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_gpi_1_s1_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_gpi_1_s1_agent_m0_address),                             //              m0.address
		.m0_burstcount           (u_gpi_1_s1_agent_m0_burstcount),                          //                .burstcount
		.m0_byteenable           (u_gpi_1_s1_agent_m0_byteenable),                          //                .byteenable
		.m0_debugaccess          (u_gpi_1_s1_agent_m0_debugaccess),                         //                .debugaccess
		.m0_lock                 (u_gpi_1_s1_agent_m0_lock),                                //                .lock
		.m0_readdata             (u_gpi_1_s1_agent_m0_readdata),                            //                .readdata
		.m0_readdatavalid        (u_gpi_1_s1_agent_m0_readdatavalid),                       //                .readdatavalid
		.m0_read                 (u_gpi_1_s1_agent_m0_read),                                //                .read
		.m0_waitrequest          (u_gpi_1_s1_agent_m0_waitrequest),                         //                .waitrequest
		.m0_writedata            (u_gpi_1_s1_agent_m0_writedata),                           //                .writedata
		.m0_write                (u_gpi_1_s1_agent_m0_write),                               //                .write
		.rp_endofpacket          (u_gpi_1_s1_agent_rp_endofpacket),                         //              rp.endofpacket
		.rp_ready                (u_gpi_1_s1_agent_rp_ready),                               //                .ready
		.rp_valid                (u_gpi_1_s1_agent_rp_valid),                               //                .valid
		.rp_data                 (u_gpi_1_s1_agent_rp_data),                                //                .data
		.rp_startofpacket        (u_gpi_1_s1_agent_rp_startofpacket),                       //                .startofpacket
		.cp_ready                (cmd_mux_024_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_024_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_024_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_024_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_024_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_024_src_channel),                                 //                .channel
		.rf_sink_ready           (u_gpi_1_s1_agent_rsp_fifo_out_ready),                     //         rf_sink.ready
		.rf_sink_valid           (u_gpi_1_s1_agent_rsp_fifo_out_valid),                     //                .valid
		.rf_sink_startofpacket   (u_gpi_1_s1_agent_rsp_fifo_out_startofpacket),             //                .startofpacket
		.rf_sink_endofpacket     (u_gpi_1_s1_agent_rsp_fifo_out_endofpacket),               //                .endofpacket
		.rf_sink_data            (u_gpi_1_s1_agent_rsp_fifo_out_data),                      //                .data
		.rf_source_ready         (u_gpi_1_s1_agent_rf_source_ready),                        //       rf_source.ready
		.rf_source_valid         (u_gpi_1_s1_agent_rf_source_valid),                        //                .valid
		.rf_source_startofpacket (u_gpi_1_s1_agent_rf_source_startofpacket),                //                .startofpacket
		.rf_source_endofpacket   (u_gpi_1_s1_agent_rf_source_endofpacket),                  //                .endofpacket
		.rf_source_data          (u_gpi_1_s1_agent_rf_source_data),                         //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_024_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_024_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_024_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_024_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_gpi_1_s1_agent_rdata_fifo_src_ready),                   //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_gpi_1_s1_agent_rdata_fifo_src_valid),                   //                .valid
		.rdata_fifo_src_data     (u_gpi_1_s1_agent_rdata_fifo_src_data),                    //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_gpi_1_s1_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_gpi_1_s1_agent_rf_source_data),                         //        in.data
		.in_valid          (u_gpi_1_s1_agent_rf_source_valid),                        //          .valid
		.in_ready          (u_gpi_1_s1_agent_rf_source_ready),                        //          .ready
		.in_startofpacket  (u_gpi_1_s1_agent_rf_source_startofpacket),                //          .startofpacket
		.in_endofpacket    (u_gpi_1_s1_agent_rf_source_endofpacket),                  //          .endofpacket
		.out_data          (u_gpi_1_s1_agent_rsp_fifo_out_data),                      //       out.data
		.out_valid         (u_gpi_1_s1_agent_rsp_fifo_out_valid),                     //          .valid
		.out_ready         (u_gpi_1_s1_agent_rsp_fifo_out_ready),                     //          .ready
		.out_startofpacket (u_gpi_1_s1_agent_rsp_fifo_out_startofpacket),             //          .startofpacket
		.out_endofpacket   (u_gpi_1_s1_agent_rsp_fifo_out_endofpacket),               //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (116),
		.PKT_ORI_BURST_SIZE_L      (114),
		.PKT_RESPONSE_STATUS_H     (113),
		.PKT_RESPONSE_STATUS_L     (112),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (92),
		.PKT_PROTECTION_H          (107),
		.PKT_PROTECTION_L          (105),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (98),
		.PKT_SRC_ID_L              (94),
		.PKT_DEST_ID_H             (103),
		.PKT_DEST_ID_L             (99),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (26),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0)
	) u_gpo_2_s1_agent (
		.clk                     (u_sys_clk_out_clk_clk),                                   //             clk.clk
		.reset                   (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (u_gpo_2_s1_agent_m0_address),                             //              m0.address
		.m0_burstcount           (u_gpo_2_s1_agent_m0_burstcount),                          //                .burstcount
		.m0_byteenable           (u_gpo_2_s1_agent_m0_byteenable),                          //                .byteenable
		.m0_debugaccess          (u_gpo_2_s1_agent_m0_debugaccess),                         //                .debugaccess
		.m0_lock                 (u_gpo_2_s1_agent_m0_lock),                                //                .lock
		.m0_readdata             (u_gpo_2_s1_agent_m0_readdata),                            //                .readdata
		.m0_readdatavalid        (u_gpo_2_s1_agent_m0_readdatavalid),                       //                .readdatavalid
		.m0_read                 (u_gpo_2_s1_agent_m0_read),                                //                .read
		.m0_waitrequest          (u_gpo_2_s1_agent_m0_waitrequest),                         //                .waitrequest
		.m0_writedata            (u_gpo_2_s1_agent_m0_writedata),                           //                .writedata
		.m0_write                (u_gpo_2_s1_agent_m0_write),                               //                .write
		.rp_endofpacket          (u_gpo_2_s1_agent_rp_endofpacket),                         //              rp.endofpacket
		.rp_ready                (u_gpo_2_s1_agent_rp_ready),                               //                .ready
		.rp_valid                (u_gpo_2_s1_agent_rp_valid),                               //                .valid
		.rp_data                 (u_gpo_2_s1_agent_rp_data),                                //                .data
		.rp_startofpacket        (u_gpo_2_s1_agent_rp_startofpacket),                       //                .startofpacket
		.cp_ready                (cmd_mux_025_src_ready),                                   //              cp.ready
		.cp_valid                (cmd_mux_025_src_valid),                                   //                .valid
		.cp_data                 (cmd_mux_025_src_data),                                    //                .data
		.cp_startofpacket        (cmd_mux_025_src_startofpacket),                           //                .startofpacket
		.cp_endofpacket          (cmd_mux_025_src_endofpacket),                             //                .endofpacket
		.cp_channel              (cmd_mux_025_src_channel),                                 //                .channel
		.rf_sink_ready           (u_gpo_2_s1_agent_rsp_fifo_out_ready),                     //         rf_sink.ready
		.rf_sink_valid           (u_gpo_2_s1_agent_rsp_fifo_out_valid),                     //                .valid
		.rf_sink_startofpacket   (u_gpo_2_s1_agent_rsp_fifo_out_startofpacket),             //                .startofpacket
		.rf_sink_endofpacket     (u_gpo_2_s1_agent_rsp_fifo_out_endofpacket),               //                .endofpacket
		.rf_sink_data            (u_gpo_2_s1_agent_rsp_fifo_out_data),                      //                .data
		.rf_source_ready         (u_gpo_2_s1_agent_rf_source_ready),                        //       rf_source.ready
		.rf_source_valid         (u_gpo_2_s1_agent_rf_source_valid),                        //                .valid
		.rf_source_startofpacket (u_gpo_2_s1_agent_rf_source_startofpacket),                //                .startofpacket
		.rf_source_endofpacket   (u_gpo_2_s1_agent_rf_source_endofpacket),                  //                .endofpacket
		.rf_source_data          (u_gpo_2_s1_agent_rf_source_data),                         //                .data
		.rdata_fifo_sink_ready   (avalon_st_adapter_025_out_0_ready),                       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (avalon_st_adapter_025_out_0_valid),                       //                .valid
		.rdata_fifo_sink_data    (avalon_st_adapter_025_out_0_data),                        //                .data
		.rdata_fifo_sink_error   (avalon_st_adapter_025_out_0_error),                       //                .error
		.rdata_fifo_src_ready    (u_gpo_2_s1_agent_rdata_fifo_src_ready),                   //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (u_gpo_2_s1_agent_rdata_fifo_src_valid),                   //                .valid
		.rdata_fifo_src_data     (u_gpo_2_s1_agent_rdata_fifo_src_data),                    //                .data
		.m0_response             (2'b00),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) u_gpo_2_s1_agent_rsp_fifo (
		.clk               (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset             (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (u_gpo_2_s1_agent_rf_source_data),                         //        in.data
		.in_valid          (u_gpo_2_s1_agent_rf_source_valid),                        //          .valid
		.in_ready          (u_gpo_2_s1_agent_rf_source_ready),                        //          .ready
		.in_startofpacket  (u_gpo_2_s1_agent_rf_source_startofpacket),                //          .startofpacket
		.in_endofpacket    (u_gpo_2_s1_agent_rf_source_endofpacket),                  //          .endofpacket
		.out_data          (u_gpo_2_s1_agent_rsp_fifo_out_data),                      //       out.data
		.out_valid         (u_gpo_2_s1_agent_rsp_fifo_out_valid),                     //          .valid
		.out_ready         (u_gpo_2_s1_agent_rsp_fifo_out_ready),                     //          .ready
		.out_startofpacket (u_gpo_2_s1_agent_rsp_fifo_out_startofpacket),             //          .startofpacket
		.out_endofpacket   (u_gpo_2_s1_agent_rsp_fifo_out_endofpacket),               //          .endofpacket
		.csr_address       (2'b00),                                                   // (terminated)
		.csr_read          (1'b0),                                                    // (terminated)
		.csr_write         (1'b0),                                                    // (terminated)
		.csr_readdata      (),                                                        // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
		.almost_full_data  (),                                                        // (terminated)
		.almost_empty_data (),                                                        // (terminated)
		.in_empty          (1'b0),                                                    // (terminated)
		.out_empty         (),                                                        // (terminated)
		.in_error          (1'b0),                                                    // (terminated)
		.out_error         (),                                                        // (terminated)
		.in_channel        (1'b0),                                                    // (terminated)
		.out_channel       ()                                                         // (terminated)
	);

	pfr_sys_mm_interconnect_0_router router (
		.sink_ready         (dma_ufm_avmm_bridge_0_avmm_agent_cp_ready),               //      sink.ready
		.sink_valid         (dma_ufm_avmm_bridge_0_avmm_agent_cp_valid),               //          .valid
		.sink_data          (dma_ufm_avmm_bridge_0_avmm_agent_cp_data),                //          .data
		.sink_startofpacket (dma_ufm_avmm_bridge_0_avmm_agent_cp_startofpacket),       //          .startofpacket
		.sink_endofpacket   (dma_ufm_avmm_bridge_0_avmm_agent_cp_endofpacket),         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_src_ready),                                        //       src.ready
		.src_valid          (router_src_valid),                                        //          .valid
		.src_data           (router_src_data),                                         //          .data
		.src_channel        (router_src_channel),                                      //          .channel
		.src_startofpacket  (router_src_startofpacket),                                //          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                                   //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_001 router_001 (
		.sink_ready         (u_nios_data_master_agent_cp_ready),                       //      sink.ready
		.sink_valid         (u_nios_data_master_agent_cp_valid),                       //          .valid
		.sink_data          (u_nios_data_master_agent_cp_data),                        //          .data
		.sink_startofpacket (u_nios_data_master_agent_cp_startofpacket),               //          .startofpacket
		.sink_endofpacket   (u_nios_data_master_agent_cp_endofpacket),                 //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_001_src_ready),                                    //       src.ready
		.src_valid          (router_001_src_valid),                                    //          .valid
		.src_data           (router_001_src_data),                                     //          .data
		.src_channel        (router_001_src_channel),                                  //          .channel
		.src_startofpacket  (router_001_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_002 router_002 (
		.sink_ready         (u_nios_instruction_master_agent_cp_ready),                //      sink.ready
		.sink_valid         (u_nios_instruction_master_agent_cp_valid),                //          .valid
		.sink_data          (u_nios_instruction_master_agent_cp_data),                 //          .data
		.sink_startofpacket (u_nios_instruction_master_agent_cp_startofpacket),        //          .startofpacket
		.sink_endofpacket   (u_nios_instruction_master_agent_cp_endofpacket),          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_002_src_ready),                                    //       src.ready
		.src_valid          (router_002_src_valid),                                    //          .valid
		.src_data           (router_002_src_data),                                     //          .data
		.src_channel        (router_002_src_channel),                                  //          .channel
		.src_startofpacket  (router_002_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_002_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_003 router_003 (
		.sink_ready         (u_ufm_data_agent_rp_ready),                               //      sink.ready
		.sink_valid         (u_ufm_data_agent_rp_valid),                               //          .valid
		.sink_data          (u_ufm_data_agent_rp_data),                                //          .data
		.sink_startofpacket (u_ufm_data_agent_rp_startofpacket),                       //          .startofpacket
		.sink_endofpacket   (u_ufm_data_agent_rp_endofpacket),                         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_003_src_ready),                                    //       src.ready
		.src_valid          (router_003_src_valid),                                    //          .valid
		.src_data           (router_003_src_data),                                     //          .data
		.src_channel        (router_003_src_channel),                                  //          .channel
		.src_startofpacket  (router_003_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_003_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_004 router_004 (
		.sink_ready         (u_nios_debug_mem_slave_agent_rp_ready),                   //      sink.ready
		.sink_valid         (u_nios_debug_mem_slave_agent_rp_valid),                   //          .valid
		.sink_data          (u_nios_debug_mem_slave_agent_rp_data),                    //          .data
		.sink_startofpacket (u_nios_debug_mem_slave_agent_rp_startofpacket),           //          .startofpacket
		.sink_endofpacket   (u_nios_debug_mem_slave_agent_rp_endofpacket),             //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_004_src_ready),                                    //       src.ready
		.src_valid          (router_004_src_valid),                                    //          .valid
		.src_data           (router_004_src_data),                                     //          .data
		.src_channel        (router_004_src_channel),                                  //          .channel
		.src_startofpacket  (router_004_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_004_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_004 router_005 (
		.sink_ready         (u_nios_ram_s1_agent_rp_ready),                            //      sink.ready
		.sink_valid         (u_nios_ram_s1_agent_rp_valid),                            //          .valid
		.sink_data          (u_nios_ram_s1_agent_rp_data),                             //          .data
		.sink_startofpacket (u_nios_ram_s1_agent_rp_startofpacket),                    //          .startofpacket
		.sink_endofpacket   (u_nios_ram_s1_agent_rp_endofpacket),                      //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_005_src_ready),                                    //       src.ready
		.src_valid          (router_005_src_valid),                                    //          .valid
		.src_data           (router_005_src_data),                                     //          .data
		.src_channel        (router_005_src_channel),                                  //          .channel
		.src_startofpacket  (router_005_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_005_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_006 (
		.sink_ready         (u_dual_config_avalon_agent_rp_ready),                     //      sink.ready
		.sink_valid         (u_dual_config_avalon_agent_rp_valid),                     //          .valid
		.sink_data          (u_dual_config_avalon_agent_rp_data),                      //          .data
		.sink_startofpacket (u_dual_config_avalon_agent_rp_startofpacket),             //          .startofpacket
		.sink_endofpacket   (u_dual_config_avalon_agent_rp_endofpacket),               //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_006_src_ready),                                    //       src.ready
		.src_valid          (router_006_src_valid),                                    //          .valid
		.src_data           (router_006_src_data),                                     //          .data
		.src_channel        (router_006_src_channel),                                  //          .channel
		.src_startofpacket  (router_006_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_006_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_007 (
		.sink_ready         (u_relay1_avmm_bridge_avmm_agent_rp_ready),                //      sink.ready
		.sink_valid         (u_relay1_avmm_bridge_avmm_agent_rp_valid),                //          .valid
		.sink_data          (u_relay1_avmm_bridge_avmm_agent_rp_data),                 //          .data
		.sink_startofpacket (u_relay1_avmm_bridge_avmm_agent_rp_startofpacket),        //          .startofpacket
		.sink_endofpacket   (u_relay1_avmm_bridge_avmm_agent_rp_endofpacket),          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_007_src_ready),                                    //       src.ready
		.src_valid          (router_007_src_valid),                                    //          .valid
		.src_data           (router_007_src_data),                                     //          .data
		.src_channel        (router_007_src_channel),                                  //          .channel
		.src_startofpacket  (router_007_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_007_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_008 (
		.sink_ready         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_ready),               //      sink.ready
		.sink_valid         (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_valid),               //          .valid
		.sink_data          (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_data),                //          .data
		.sink_startofpacket (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_startofpacket),       //          .startofpacket
		.sink_endofpacket   (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rp_endofpacket),         //          .endofpacket
		.clk                (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset              (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_008_src_ready),                                             //       src.ready
		.src_valid          (router_008_src_valid),                                             //          .valid
		.src_data           (router_008_src_data),                                              //          .data
		.src_channel        (router_008_src_channel),                                           //          .channel
		.src_startofpacket  (router_008_src_startofpacket),                                     //          .startofpacket
		.src_endofpacket    (router_008_src_endofpacket)                                        //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_009 (
		.sink_ready         (u_relay3_avmm_bridge_avmm_agent_rp_ready),                //      sink.ready
		.sink_valid         (u_relay3_avmm_bridge_avmm_agent_rp_valid),                //          .valid
		.sink_data          (u_relay3_avmm_bridge_avmm_agent_rp_data),                 //          .data
		.sink_startofpacket (u_relay3_avmm_bridge_avmm_agent_rp_startofpacket),        //          .startofpacket
		.sink_endofpacket   (u_relay3_avmm_bridge_avmm_agent_rp_endofpacket),          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_009_src_ready),                                    //       src.ready
		.src_valid          (router_009_src_valid),                                    //          .valid
		.src_data           (router_009_src_data),                                     //          .data
		.src_channel        (router_009_src_channel),                                  //          .channel
		.src_startofpacket  (router_009_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_009_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_010 (
		.sink_ready         (u_mailbox_avmm_bridge_avmm_agent_rp_ready),               //      sink.ready
		.sink_valid         (u_mailbox_avmm_bridge_avmm_agent_rp_valid),               //          .valid
		.sink_data          (u_mailbox_avmm_bridge_avmm_agent_rp_data),                //          .data
		.sink_startofpacket (u_mailbox_avmm_bridge_avmm_agent_rp_startofpacket),       //          .startofpacket
		.sink_endofpacket   (u_mailbox_avmm_bridge_avmm_agent_rp_endofpacket),         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_010_src_ready),                                    //       src.ready
		.src_valid          (router_010_src_valid),                                    //          .valid
		.src_data           (router_010_src_data),                                     //          .data
		.src_channel        (router_010_src_channel),                                  //          .channel
		.src_startofpacket  (router_010_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_010_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_011 (
		.sink_ready         (u_rfnvram_smbus_master_avmm_agent_rp_ready),              //      sink.ready
		.sink_valid         (u_rfnvram_smbus_master_avmm_agent_rp_valid),              //          .valid
		.sink_data          (u_rfnvram_smbus_master_avmm_agent_rp_data),               //          .data
		.sink_startofpacket (u_rfnvram_smbus_master_avmm_agent_rp_startofpacket),      //          .startofpacket
		.sink_endofpacket   (u_rfnvram_smbus_master_avmm_agent_rp_endofpacket),        //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_011_src_ready),                                    //       src.ready
		.src_valid          (router_011_src_valid),                                    //          .valid
		.src_data           (router_011_src_data),                                     //          .data
		.src_channel        (router_011_src_channel),                                  //          .channel
		.src_startofpacket  (router_011_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_011_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_012 (
		.sink_ready         (u_spi_filter_avmm_bridge_avmm_agent_rp_ready),                     //      sink.ready
		.sink_valid         (u_spi_filter_avmm_bridge_avmm_agent_rp_valid),                     //          .valid
		.sink_data          (u_spi_filter_avmm_bridge_avmm_agent_rp_data),                      //          .data
		.sink_startofpacket (u_spi_filter_avmm_bridge_avmm_agent_rp_startofpacket),             //          .startofpacket
		.sink_endofpacket   (u_spi_filter_avmm_bridge_avmm_agent_rp_endofpacket),               //          .endofpacket
		.clk                (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset              (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_012_src_ready),                                             //       src.ready
		.src_valid          (router_012_src_valid),                                             //          .valid
		.src_data           (router_012_src_data),                                              //          .data
		.src_channel        (router_012_src_channel),                                           //          .channel
		.src_startofpacket  (router_012_src_startofpacket),                                     //          .startofpacket
		.src_endofpacket    (router_012_src_endofpacket)                                        //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_013 (
		.sink_ready         (u_timer_bank_avmm_bridge_avmm_agent_rp_ready),            //      sink.ready
		.sink_valid         (u_timer_bank_avmm_bridge_avmm_agent_rp_valid),            //          .valid
		.sink_data          (u_timer_bank_avmm_bridge_avmm_agent_rp_data),             //          .data
		.sink_startofpacket (u_timer_bank_avmm_bridge_avmm_agent_rp_startofpacket),    //          .startofpacket
		.sink_endofpacket   (u_timer_bank_avmm_bridge_avmm_agent_rp_endofpacket),      //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_013_src_ready),                                    //       src.ready
		.src_valid          (router_013_src_valid),                                    //          .valid
		.src_data           (router_013_src_data),                                     //          .data
		.src_channel        (router_013_src_channel),                                  //          .channel
		.src_startofpacket  (router_013_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_013_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_014 (
		.sink_ready         (u_crypto_dma_avmm_bridge_avmm_agent_rp_ready),            //      sink.ready
		.sink_valid         (u_crypto_dma_avmm_bridge_avmm_agent_rp_valid),            //          .valid
		.sink_data          (u_crypto_dma_avmm_bridge_avmm_agent_rp_data),             //          .data
		.sink_startofpacket (u_crypto_dma_avmm_bridge_avmm_agent_rp_startofpacket),    //          .startofpacket
		.sink_endofpacket   (u_crypto_dma_avmm_bridge_avmm_agent_rp_endofpacket),      //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_014_src_ready),                                    //       src.ready
		.src_valid          (router_014_src_valid),                                    //          .valid
		.src_data           (router_014_src_data),                                     //          .data
		.src_channel        (router_014_src_channel),                                  //          .channel
		.src_startofpacket  (router_014_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_014_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_015 (
		.sink_ready         (u_crypto_avmm_bridge_avmm_agent_rp_ready),                //      sink.ready
		.sink_valid         (u_crypto_avmm_bridge_avmm_agent_rp_valid),                //          .valid
		.sink_data          (u_crypto_avmm_bridge_avmm_agent_rp_data),                 //          .data
		.sink_startofpacket (u_crypto_avmm_bridge_avmm_agent_rp_startofpacket),        //          .startofpacket
		.sink_endofpacket   (u_crypto_avmm_bridge_avmm_agent_rp_endofpacket),          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_015_src_ready),                                    //       src.ready
		.src_valid          (router_015_src_valid),                                    //          .valid
		.src_data           (router_015_src_data),                                     //          .data
		.src_channel        (router_015_src_channel),                                  //          .channel
		.src_startofpacket  (router_015_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_015_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_016 (
		.sink_ready         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_ready),         //      sink.ready
		.sink_valid         (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_valid),         //          .valid
		.sink_data          (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_data),          //          .data
		.sink_startofpacket (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rp_endofpacket),   //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                       //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
		.src_ready          (router_016_src_ready),                                        //       src.ready
		.src_valid          (router_016_src_valid),                                        //          .valid
		.src_data           (router_016_src_data),                                         //          .data
		.src_channel        (router_016_src_channel),                                      //          .channel
		.src_startofpacket  (router_016_src_startofpacket),                                //          .startofpacket
		.src_endofpacket    (router_016_src_endofpacket)                                   //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_017 (
		.sink_ready         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_ready),         //      sink.ready
		.sink_valid         (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_valid),         //          .valid
		.sink_data          (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_data),          //          .data
		.sink_startofpacket (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket),   //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                               //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             // clk_reset.reset
		.src_ready          (router_017_src_ready),                                                //       src.ready
		.src_valid          (router_017_src_valid),                                                //          .valid
		.src_data           (router_017_src_data),                                                 //          .data
		.src_channel        (router_017_src_channel),                                              //          .channel
		.src_startofpacket  (router_017_src_startofpacket),                                        //          .startofpacket
		.src_endofpacket    (router_017_src_endofpacket)                                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_018 (
		.sink_ready         (u_i3c_avmm_bridge_avmm_agent_rp_ready),               //      sink.ready
		.sink_valid         (u_i3c_avmm_bridge_avmm_agent_rp_valid),               //          .valid
		.sink_data          (u_i3c_avmm_bridge_avmm_agent_rp_data),                //          .data
		.sink_startofpacket (u_i3c_avmm_bridge_avmm_agent_rp_startofpacket),       //          .startofpacket
		.sink_endofpacket   (u_i3c_avmm_bridge_avmm_agent_rp_endofpacket),         //          .endofpacket
		.clk                (u_i3c_clk_out_clk_clk),                               //       clk.clk
		.reset              (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_018_src_ready),                                //       src.ready
		.src_valid          (router_018_src_valid),                                //          .valid
		.src_data           (router_018_src_data),                                 //          .data
		.src_channel        (router_018_src_channel),                              //          .channel
		.src_startofpacket  (router_018_src_startofpacket),                        //          .startofpacket
		.src_endofpacket    (router_018_src_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_019 (
		.sink_ready         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_ready),         //      sink.ready
		.sink_valid         (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_valid),         //          .valid
		.sink_data          (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_data),          //          .data
		.sink_startofpacket (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rp_endofpacket),   //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                               //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             // clk_reset.reset
		.src_ready          (router_019_src_ready),                                                //       src.ready
		.src_valid          (router_019_src_valid),                                                //          .valid
		.src_data           (router_019_src_data),                                                 //          .data
		.src_channel        (router_019_src_channel),                                              //          .channel
		.src_startofpacket  (router_019_src_startofpacket),                                        //          .startofpacket
		.src_endofpacket    (router_019_src_endofpacket)                                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_020 (
		.sink_ready         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_ready),         //      sink.ready
		.sink_valid         (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_valid),         //          .valid
		.sink_data          (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_data),          //          .data
		.sink_startofpacket (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket),   //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                               //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             // clk_reset.reset
		.src_ready          (router_020_src_ready),                                                //       src.ready
		.src_valid          (router_020_src_valid),                                                //          .valid
		.src_data           (router_020_src_data),                                                 //          .data
		.src_channel        (router_020_src_channel),                                              //          .channel
		.src_startofpacket  (router_020_src_startofpacket),                                        //          .startofpacket
		.src_endofpacket    (router_020_src_endofpacket)                                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_021 (
		.sink_ready         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_ready),         //      sink.ready
		.sink_valid         (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_valid),         //          .valid
		.sink_data          (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_data),          //          .data
		.sink_startofpacket (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rp_endofpacket),   //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                               //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),             // clk_reset.reset
		.src_ready          (router_021_src_ready),                                                //       src.ready
		.src_valid          (router_021_src_valid),                                                //          .valid
		.src_data           (router_021_src_data),                                                 //          .data
		.src_channel        (router_021_src_channel),                                              //          .channel
		.src_startofpacket  (router_021_src_startofpacket),                                        //          .startofpacket
		.src_endofpacket    (router_021_src_endofpacket)                                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_022 (
		.sink_ready         (u_relay2_avmm_bridge_avmm_agent_rp_ready),                //      sink.ready
		.sink_valid         (u_relay2_avmm_bridge_avmm_agent_rp_valid),                //          .valid
		.sink_data          (u_relay2_avmm_bridge_avmm_agent_rp_data),                 //          .data
		.sink_startofpacket (u_relay2_avmm_bridge_avmm_agent_rp_startofpacket),        //          .startofpacket
		.sink_endofpacket   (u_relay2_avmm_bridge_avmm_agent_rp_endofpacket),          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_022_src_ready),                                    //       src.ready
		.src_valid          (router_022_src_valid),                                    //          .valid
		.src_data           (router_022_src_data),                                     //          .data
		.src_channel        (router_022_src_channel),                                  //          .channel
		.src_startofpacket  (router_022_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_022_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_023 (
		.sink_ready         (u_aes_avmm_bridge_avmm_agent_rp_ready),                   //      sink.ready
		.sink_valid         (u_aes_avmm_bridge_avmm_agent_rp_valid),                   //          .valid
		.sink_data          (u_aes_avmm_bridge_avmm_agent_rp_data),                    //          .data
		.sink_startofpacket (u_aes_avmm_bridge_avmm_agent_rp_startofpacket),           //          .startofpacket
		.sink_endofpacket   (u_aes_avmm_bridge_avmm_agent_rp_endofpacket),             //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_023_src_ready),                                    //       src.ready
		.src_valid          (router_023_src_valid),                                    //          .valid
		.src_data           (router_023_src_data),                                     //          .data
		.src_channel        (router_023_src_channel),                                  //          .channel
		.src_startofpacket  (router_023_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_023_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_024 (
		.sink_ready         (u_ufm_csr_agent_rp_ready),                                //      sink.ready
		.sink_valid         (u_ufm_csr_agent_rp_valid),                                //          .valid
		.sink_data          (u_ufm_csr_agent_rp_data),                                 //          .data
		.sink_startofpacket (u_ufm_csr_agent_rp_startofpacket),                        //          .startofpacket
		.sink_endofpacket   (u_ufm_csr_agent_rp_endofpacket),                          //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_024_src_ready),                                    //       src.ready
		.src_valid          (router_024_src_valid),                                    //          .valid
		.src_data           (router_024_src_data),                                     //          .data
		.src_channel        (router_024_src_channel),                                  //          .channel
		.src_startofpacket  (router_024_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_024_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_025 (
		.sink_ready         (u_global_state_reg_s1_agent_rp_ready),                    //      sink.ready
		.sink_valid         (u_global_state_reg_s1_agent_rp_valid),                    //          .valid
		.sink_data          (u_global_state_reg_s1_agent_rp_data),                     //          .data
		.sink_startofpacket (u_global_state_reg_s1_agent_rp_startofpacket),            //          .startofpacket
		.sink_endofpacket   (u_global_state_reg_s1_agent_rp_endofpacket),              //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_025_src_ready),                                    //       src.ready
		.src_valid          (router_025_src_valid),                                    //          .valid
		.src_data           (router_025_src_data),                                     //          .data
		.src_channel        (router_025_src_channel),                                  //          .channel
		.src_startofpacket  (router_025_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_025_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_026 (
		.sink_ready         (u_gpo_1_s1_agent_rp_ready),                               //      sink.ready
		.sink_valid         (u_gpo_1_s1_agent_rp_valid),                               //          .valid
		.sink_data          (u_gpo_1_s1_agent_rp_data),                                //          .data
		.sink_startofpacket (u_gpo_1_s1_agent_rp_startofpacket),                       //          .startofpacket
		.sink_endofpacket   (u_gpo_1_s1_agent_rp_endofpacket),                         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_026_src_ready),                                    //       src.ready
		.src_valid          (router_026_src_valid),                                    //          .valid
		.src_data           (router_026_src_data),                                     //          .data
		.src_channel        (router_026_src_channel),                                  //          .channel
		.src_startofpacket  (router_026_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_026_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_027 (
		.sink_ready         (u_gpi_1_s1_agent_rp_ready),                               //      sink.ready
		.sink_valid         (u_gpi_1_s1_agent_rp_valid),                               //          .valid
		.sink_data          (u_gpi_1_s1_agent_rp_data),                                //          .data
		.sink_startofpacket (u_gpi_1_s1_agent_rp_startofpacket),                       //          .startofpacket
		.sink_endofpacket   (u_gpi_1_s1_agent_rp_endofpacket),                         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_027_src_ready),                                    //       src.ready
		.src_valid          (router_027_src_valid),                                    //          .valid
		.src_data           (router_027_src_data),                                     //          .data
		.src_channel        (router_027_src_channel),                                  //          .channel
		.src_startofpacket  (router_027_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_027_src_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_router_006 router_028 (
		.sink_ready         (u_gpo_2_s1_agent_rp_ready),                               //      sink.ready
		.sink_valid         (u_gpo_2_s1_agent_rp_valid),                               //          .valid
		.sink_data          (u_gpo_2_s1_agent_rp_data),                                //          .data
		.sink_startofpacket (u_gpo_2_s1_agent_rp_startofpacket),                       //          .startofpacket
		.sink_endofpacket   (u_gpo_2_s1_agent_rp_endofpacket),                         //          .endofpacket
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_028_src_ready),                                    //       src.ready
		.src_valid          (router_028_src_valid),                                    //          .valid
		.src_data           (router_028_src_data),                                     //          .data
		.src_channel        (router_028_src_channel),                                  //          .channel
		.src_startofpacket  (router_028_src_startofpacket),                            //          .startofpacket
		.src_endofpacket    (router_028_src_endofpacket)                               //          .endofpacket
	);

	altera_merlin_burst_adapter #(
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_BEGIN_BURST           (92),
		.PKT_BYTE_CNT_H            (81),
		.PKT_BYTE_CNT_L            (74),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_BURST_SIZE_H          (87),
		.PKT_BURST_SIZE_L          (85),
		.PKT_BURST_TYPE_H          (89),
		.PKT_BURST_TYPE_L          (88),
		.PKT_BURSTWRAP_H           (84),
		.PKT_BURSTWRAP_L           (82),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.OUT_NARROW_SIZE           (0),
		.IN_NARROW_SIZE            (0),
		.OUT_FIXED                 (0),
		.OUT_COMPLETE_WRAP         (0),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (26),
		.OUT_BYTE_CNT_H            (77),
		.OUT_BURSTWRAP_H           (84),
		.COMPRESSED_READ_SUPPORT   (1),
		.BYTEENABLE_SYNTHESIS      (1),
		.PIPE_INPUTS               (0),
		.NO_WRAP_SUPPORT           (0),
		.INCOMPLETE_WRAP_SUPPORT   (0),
		.BURSTWRAP_CONST_MASK      (3),
		.BURSTWRAP_CONST_VALUE     (3),
		.ADAPTER_VERSION           ("13.1")
	) u_ufm_data_burst_adapter (
		.clk                   (u_sys_clk_out_clk_clk),                                   //       cr0.clk
		.reset                 (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // cr0_reset.reset
		.sink0_valid           (cmd_mux_src_valid),                                       //     sink0.valid
		.sink0_data            (cmd_mux_src_data),                                        //          .data
		.sink0_channel         (cmd_mux_src_channel),                                     //          .channel
		.sink0_startofpacket   (cmd_mux_src_startofpacket),                               //          .startofpacket
		.sink0_endofpacket     (cmd_mux_src_endofpacket),                                 //          .endofpacket
		.sink0_ready           (cmd_mux_src_ready),                                       //          .ready
		.source0_valid         (u_ufm_data_burst_adapter_source0_valid),                  //   source0.valid
		.source0_data          (u_ufm_data_burst_adapter_source0_data),                   //          .data
		.source0_channel       (u_ufm_data_burst_adapter_source0_channel),                //          .channel
		.source0_startofpacket (u_ufm_data_burst_adapter_source0_startofpacket),          //          .startofpacket
		.source0_endofpacket   (u_ufm_data_burst_adapter_source0_endofpacket),            //          .endofpacket
		.source0_ready         (u_ufm_data_burst_adapter_source0_ready)                   //          .ready
	);

	pfr_sys_mm_interconnect_0_cmd_demux cmd_demux (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_src_ready),                                        //      sink.ready
		.sink_channel       (router_src_channel),                                      //          .channel
		.sink_data          (router_src_data),                                         //          .data
		.sink_startofpacket (router_src_startofpacket),                                //          .startofpacket
		.sink_endofpacket   (router_src_endofpacket),                                  //          .endofpacket
		.sink_valid         (router_src_valid),                                        //          .valid
		.src0_ready         (cmd_demux_src0_ready),                                    //      src0.ready
		.src0_valid         (cmd_demux_src0_valid),                                    //          .valid
		.src0_data          (cmd_demux_src0_data),                                     //          .data
		.src0_channel       (cmd_demux_src0_channel),                                  //          .channel
		.src0_startofpacket (cmd_demux_src0_startofpacket),                            //          .startofpacket
		.src0_endofpacket   (cmd_demux_src0_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux_001 cmd_demux_001 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready          (router_001_src_ready),                                    //      sink.ready
		.sink_channel        (router_001_src_channel),                                  //          .channel
		.sink_data           (router_001_src_data),                                     //          .data
		.sink_startofpacket  (router_001_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket    (router_001_src_endofpacket),                              //          .endofpacket
		.sink_valid          (router_001_src_valid),                                    //          .valid
		.src0_ready          (cmd_demux_001_src0_ready),                                //      src0.ready
		.src0_valid          (cmd_demux_001_src0_valid),                                //          .valid
		.src0_data           (cmd_demux_001_src0_data),                                 //          .data
		.src0_channel        (cmd_demux_001_src0_channel),                              //          .channel
		.src0_startofpacket  (cmd_demux_001_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket    (cmd_demux_001_src0_endofpacket),                          //          .endofpacket
		.src1_ready          (cmd_demux_001_src1_ready),                                //      src1.ready
		.src1_valid          (cmd_demux_001_src1_valid),                                //          .valid
		.src1_data           (cmd_demux_001_src1_data),                                 //          .data
		.src1_channel        (cmd_demux_001_src1_channel),                              //          .channel
		.src1_startofpacket  (cmd_demux_001_src1_startofpacket),                        //          .startofpacket
		.src1_endofpacket    (cmd_demux_001_src1_endofpacket),                          //          .endofpacket
		.src2_ready          (cmd_demux_001_src2_ready),                                //      src2.ready
		.src2_valid          (cmd_demux_001_src2_valid),                                //          .valid
		.src2_data           (cmd_demux_001_src2_data),                                 //          .data
		.src2_channel        (cmd_demux_001_src2_channel),                              //          .channel
		.src2_startofpacket  (cmd_demux_001_src2_startofpacket),                        //          .startofpacket
		.src2_endofpacket    (cmd_demux_001_src2_endofpacket),                          //          .endofpacket
		.src3_ready          (cmd_demux_001_src3_ready),                                //      src3.ready
		.src3_valid          (cmd_demux_001_src3_valid),                                //          .valid
		.src3_data           (cmd_demux_001_src3_data),                                 //          .data
		.src3_channel        (cmd_demux_001_src3_channel),                              //          .channel
		.src3_startofpacket  (cmd_demux_001_src3_startofpacket),                        //          .startofpacket
		.src3_endofpacket    (cmd_demux_001_src3_endofpacket),                          //          .endofpacket
		.src4_ready          (cmd_demux_001_src4_ready),                                //      src4.ready
		.src4_valid          (cmd_demux_001_src4_valid),                                //          .valid
		.src4_data           (cmd_demux_001_src4_data),                                 //          .data
		.src4_channel        (cmd_demux_001_src4_channel),                              //          .channel
		.src4_startofpacket  (cmd_demux_001_src4_startofpacket),                        //          .startofpacket
		.src4_endofpacket    (cmd_demux_001_src4_endofpacket),                          //          .endofpacket
		.src5_ready          (cmd_demux_001_src5_ready),                                //      src5.ready
		.src5_valid          (cmd_demux_001_src5_valid),                                //          .valid
		.src5_data           (cmd_demux_001_src5_data),                                 //          .data
		.src5_channel        (cmd_demux_001_src5_channel),                              //          .channel
		.src5_startofpacket  (cmd_demux_001_src5_startofpacket),                        //          .startofpacket
		.src5_endofpacket    (cmd_demux_001_src5_endofpacket),                          //          .endofpacket
		.src6_ready          (cmd_demux_001_src6_ready),                                //      src6.ready
		.src6_valid          (cmd_demux_001_src6_valid),                                //          .valid
		.src6_data           (cmd_demux_001_src6_data),                                 //          .data
		.src6_channel        (cmd_demux_001_src6_channel),                              //          .channel
		.src6_startofpacket  (cmd_demux_001_src6_startofpacket),                        //          .startofpacket
		.src6_endofpacket    (cmd_demux_001_src6_endofpacket),                          //          .endofpacket
		.src7_ready          (cmd_demux_001_src7_ready),                                //      src7.ready
		.src7_valid          (cmd_demux_001_src7_valid),                                //          .valid
		.src7_data           (cmd_demux_001_src7_data),                                 //          .data
		.src7_channel        (cmd_demux_001_src7_channel),                              //          .channel
		.src7_startofpacket  (cmd_demux_001_src7_startofpacket),                        //          .startofpacket
		.src7_endofpacket    (cmd_demux_001_src7_endofpacket),                          //          .endofpacket
		.src8_ready          (cmd_demux_001_src8_ready),                                //      src8.ready
		.src8_valid          (cmd_demux_001_src8_valid),                                //          .valid
		.src8_data           (cmd_demux_001_src8_data),                                 //          .data
		.src8_channel        (cmd_demux_001_src8_channel),                              //          .channel
		.src8_startofpacket  (cmd_demux_001_src8_startofpacket),                        //          .startofpacket
		.src8_endofpacket    (cmd_demux_001_src8_endofpacket),                          //          .endofpacket
		.src9_ready          (cmd_demux_001_src9_ready),                                //      src9.ready
		.src9_valid          (cmd_demux_001_src9_valid),                                //          .valid
		.src9_data           (cmd_demux_001_src9_data),                                 //          .data
		.src9_channel        (cmd_demux_001_src9_channel),                              //          .channel
		.src9_startofpacket  (cmd_demux_001_src9_startofpacket),                        //          .startofpacket
		.src9_endofpacket    (cmd_demux_001_src9_endofpacket),                          //          .endofpacket
		.src10_ready         (cmd_demux_001_src10_ready),                               //     src10.ready
		.src10_valid         (cmd_demux_001_src10_valid),                               //          .valid
		.src10_data          (cmd_demux_001_src10_data),                                //          .data
		.src10_channel       (cmd_demux_001_src10_channel),                             //          .channel
		.src10_startofpacket (cmd_demux_001_src10_startofpacket),                       //          .startofpacket
		.src10_endofpacket   (cmd_demux_001_src10_endofpacket),                         //          .endofpacket
		.src11_ready         (cmd_demux_001_src11_ready),                               //     src11.ready
		.src11_valid         (cmd_demux_001_src11_valid),                               //          .valid
		.src11_data          (cmd_demux_001_src11_data),                                //          .data
		.src11_channel       (cmd_demux_001_src11_channel),                             //          .channel
		.src11_startofpacket (cmd_demux_001_src11_startofpacket),                       //          .startofpacket
		.src11_endofpacket   (cmd_demux_001_src11_endofpacket),                         //          .endofpacket
		.src12_ready         (cmd_demux_001_src12_ready),                               //     src12.ready
		.src12_valid         (cmd_demux_001_src12_valid),                               //          .valid
		.src12_data          (cmd_demux_001_src12_data),                                //          .data
		.src12_channel       (cmd_demux_001_src12_channel),                             //          .channel
		.src12_startofpacket (cmd_demux_001_src12_startofpacket),                       //          .startofpacket
		.src12_endofpacket   (cmd_demux_001_src12_endofpacket),                         //          .endofpacket
		.src13_ready         (cmd_demux_001_src13_ready),                               //     src13.ready
		.src13_valid         (cmd_demux_001_src13_valid),                               //          .valid
		.src13_data          (cmd_demux_001_src13_data),                                //          .data
		.src13_channel       (cmd_demux_001_src13_channel),                             //          .channel
		.src13_startofpacket (cmd_demux_001_src13_startofpacket),                       //          .startofpacket
		.src13_endofpacket   (cmd_demux_001_src13_endofpacket),                         //          .endofpacket
		.src14_ready         (cmd_demux_001_src14_ready),                               //     src14.ready
		.src14_valid         (cmd_demux_001_src14_valid),                               //          .valid
		.src14_data          (cmd_demux_001_src14_data),                                //          .data
		.src14_channel       (cmd_demux_001_src14_channel),                             //          .channel
		.src14_startofpacket (cmd_demux_001_src14_startofpacket),                       //          .startofpacket
		.src14_endofpacket   (cmd_demux_001_src14_endofpacket),                         //          .endofpacket
		.src15_ready         (cmd_demux_001_src15_ready),                               //     src15.ready
		.src15_valid         (cmd_demux_001_src15_valid),                               //          .valid
		.src15_data          (cmd_demux_001_src15_data),                                //          .data
		.src15_channel       (cmd_demux_001_src15_channel),                             //          .channel
		.src15_startofpacket (cmd_demux_001_src15_startofpacket),                       //          .startofpacket
		.src15_endofpacket   (cmd_demux_001_src15_endofpacket),                         //          .endofpacket
		.src16_ready         (cmd_demux_001_src16_ready),                               //     src16.ready
		.src16_valid         (cmd_demux_001_src16_valid),                               //          .valid
		.src16_data          (cmd_demux_001_src16_data),                                //          .data
		.src16_channel       (cmd_demux_001_src16_channel),                             //          .channel
		.src16_startofpacket (cmd_demux_001_src16_startofpacket),                       //          .startofpacket
		.src16_endofpacket   (cmd_demux_001_src16_endofpacket),                         //          .endofpacket
		.src17_ready         (cmd_demux_001_src17_ready),                               //     src17.ready
		.src17_valid         (cmd_demux_001_src17_valid),                               //          .valid
		.src17_data          (cmd_demux_001_src17_data),                                //          .data
		.src17_channel       (cmd_demux_001_src17_channel),                             //          .channel
		.src17_startofpacket (cmd_demux_001_src17_startofpacket),                       //          .startofpacket
		.src17_endofpacket   (cmd_demux_001_src17_endofpacket),                         //          .endofpacket
		.src18_ready         (cmd_demux_001_src18_ready),                               //     src18.ready
		.src18_valid         (cmd_demux_001_src18_valid),                               //          .valid
		.src18_data          (cmd_demux_001_src18_data),                                //          .data
		.src18_channel       (cmd_demux_001_src18_channel),                             //          .channel
		.src18_startofpacket (cmd_demux_001_src18_startofpacket),                       //          .startofpacket
		.src18_endofpacket   (cmd_demux_001_src18_endofpacket),                         //          .endofpacket
		.src19_ready         (cmd_demux_001_src19_ready),                               //     src19.ready
		.src19_valid         (cmd_demux_001_src19_valid),                               //          .valid
		.src19_data          (cmd_demux_001_src19_data),                                //          .data
		.src19_channel       (cmd_demux_001_src19_channel),                             //          .channel
		.src19_startofpacket (cmd_demux_001_src19_startofpacket),                       //          .startofpacket
		.src19_endofpacket   (cmd_demux_001_src19_endofpacket),                         //          .endofpacket
		.src20_ready         (cmd_demux_001_src20_ready),                               //     src20.ready
		.src20_valid         (cmd_demux_001_src20_valid),                               //          .valid
		.src20_data          (cmd_demux_001_src20_data),                                //          .data
		.src20_channel       (cmd_demux_001_src20_channel),                             //          .channel
		.src20_startofpacket (cmd_demux_001_src20_startofpacket),                       //          .startofpacket
		.src20_endofpacket   (cmd_demux_001_src20_endofpacket),                         //          .endofpacket
		.src21_ready         (cmd_demux_001_src21_ready),                               //     src21.ready
		.src21_valid         (cmd_demux_001_src21_valid),                               //          .valid
		.src21_data          (cmd_demux_001_src21_data),                                //          .data
		.src21_channel       (cmd_demux_001_src21_channel),                             //          .channel
		.src21_startofpacket (cmd_demux_001_src21_startofpacket),                       //          .startofpacket
		.src21_endofpacket   (cmd_demux_001_src21_endofpacket),                         //          .endofpacket
		.src22_ready         (cmd_demux_001_src22_ready),                               //     src22.ready
		.src22_valid         (cmd_demux_001_src22_valid),                               //          .valid
		.src22_data          (cmd_demux_001_src22_data),                                //          .data
		.src22_channel       (cmd_demux_001_src22_channel),                             //          .channel
		.src22_startofpacket (cmd_demux_001_src22_startofpacket),                       //          .startofpacket
		.src22_endofpacket   (cmd_demux_001_src22_endofpacket),                         //          .endofpacket
		.src23_ready         (cmd_demux_001_src23_ready),                               //     src23.ready
		.src23_valid         (cmd_demux_001_src23_valid),                               //          .valid
		.src23_data          (cmd_demux_001_src23_data),                                //          .data
		.src23_channel       (cmd_demux_001_src23_channel),                             //          .channel
		.src23_startofpacket (cmd_demux_001_src23_startofpacket),                       //          .startofpacket
		.src23_endofpacket   (cmd_demux_001_src23_endofpacket),                         //          .endofpacket
		.src24_ready         (cmd_demux_001_src24_ready),                               //     src24.ready
		.src24_valid         (cmd_demux_001_src24_valid),                               //          .valid
		.src24_data          (cmd_demux_001_src24_data),                                //          .data
		.src24_channel       (cmd_demux_001_src24_channel),                             //          .channel
		.src24_startofpacket (cmd_demux_001_src24_startofpacket),                       //          .startofpacket
		.src24_endofpacket   (cmd_demux_001_src24_endofpacket),                         //          .endofpacket
		.src25_ready         (cmd_demux_001_src25_ready),                               //     src25.ready
		.src25_valid         (cmd_demux_001_src25_valid),                               //          .valid
		.src25_data          (cmd_demux_001_src25_data),                                //          .data
		.src25_channel       (cmd_demux_001_src25_channel),                             //          .channel
		.src25_startofpacket (cmd_demux_001_src25_startofpacket),                       //          .startofpacket
		.src25_endofpacket   (cmd_demux_001_src25_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux_002 cmd_demux_002 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_002_src_ready),                                    //      sink.ready
		.sink_channel       (router_002_src_channel),                                  //          .channel
		.sink_data          (router_002_src_data),                                     //          .data
		.sink_startofpacket (router_002_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_002_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_002_src_valid),                                    //          .valid
		.src0_ready         (cmd_demux_002_src0_ready),                                //      src0.ready
		.src0_valid         (cmd_demux_002_src0_valid),                                //          .valid
		.src0_data          (cmd_demux_002_src0_data),                                 //          .data
		.src0_channel       (cmd_demux_002_src0_channel),                              //          .channel
		.src0_startofpacket (cmd_demux_002_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (cmd_demux_002_src0_endofpacket),                          //          .endofpacket
		.src1_ready         (cmd_demux_002_src1_ready),                                //      src1.ready
		.src1_valid         (cmd_demux_002_src1_valid),                                //          .valid
		.src1_data          (cmd_demux_002_src1_data),                                 //          .data
		.src1_channel       (cmd_demux_002_src1_channel),                              //          .channel
		.src1_startofpacket (cmd_demux_002_src1_startofpacket),                        //          .startofpacket
		.src1_endofpacket   (cmd_demux_002_src1_endofpacket),                          //          .endofpacket
		.src2_ready         (cmd_demux_002_src2_ready),                                //      src2.ready
		.src2_valid         (cmd_demux_002_src2_valid),                                //          .valid
		.src2_data          (cmd_demux_002_src2_data),                                 //          .data
		.src2_channel       (cmd_demux_002_src2_channel),                              //          .channel
		.src2_startofpacket (cmd_demux_002_src2_startofpacket),                        //          .startofpacket
		.src2_endofpacket   (cmd_demux_002_src2_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux cmd_mux (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                                       //       src.ready
		.src_valid           (cmd_mux_src_valid),                                       //          .valid
		.src_data            (cmd_mux_src_data),                                        //          .data
		.src_channel         (cmd_mux_src_channel),                                     //          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),                               //          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                                 //          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                                    //     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                                    //          .valid
		.sink0_channel       (cmd_demux_src0_channel),                                  //          .channel
		.sink0_data          (cmd_demux_src0_data),                                     //          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),                            //          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket),                              //          .endofpacket
		.sink1_ready         (cmd_demux_001_src0_ready),                                //     sink1.ready
		.sink1_valid         (cmd_demux_001_src0_valid),                                //          .valid
		.sink1_channel       (cmd_demux_001_src0_channel),                              //          .channel
		.sink1_data          (cmd_demux_001_src0_data),                                 //          .data
		.sink1_startofpacket (cmd_demux_001_src0_startofpacket),                        //          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src0_endofpacket),                          //          .endofpacket
		.sink2_ready         (cmd_demux_002_src0_ready),                                //     sink2.ready
		.sink2_valid         (cmd_demux_002_src0_valid),                                //          .valid
		.sink2_channel       (cmd_demux_002_src0_channel),                              //          .channel
		.sink2_data          (cmd_demux_002_src0_data),                                 //          .data
		.sink2_startofpacket (cmd_demux_002_src0_startofpacket),                        //          .startofpacket
		.sink2_endofpacket   (cmd_demux_002_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_001 cmd_mux_001 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_001_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_001_src_valid),                                   //          .valid
		.src_data            (cmd_mux_001_src_data),                                    //          .data
		.src_channel         (cmd_mux_001_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_001_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_001_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src1_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src1_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src1_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src1_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src1_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src1_endofpacket),                          //          .endofpacket
		.sink1_ready         (cmd_demux_002_src1_ready),                                //     sink1.ready
		.sink1_valid         (cmd_demux_002_src1_valid),                                //          .valid
		.sink1_channel       (cmd_demux_002_src1_channel),                              //          .channel
		.sink1_data          (cmd_demux_002_src1_data),                                 //          .data
		.sink1_startofpacket (cmd_demux_002_src1_startofpacket),                        //          .startofpacket
		.sink1_endofpacket   (cmd_demux_002_src1_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_001 cmd_mux_002 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_002_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_002_src_valid),                                   //          .valid
		.src_data            (cmd_mux_002_src_data),                                    //          .data
		.src_channel         (cmd_mux_002_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_002_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_002_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src2_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src2_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src2_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src2_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src2_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src2_endofpacket),                          //          .endofpacket
		.sink1_ready         (cmd_demux_002_src2_ready),                                //     sink1.ready
		.sink1_valid         (cmd_demux_002_src2_valid),                                //          .valid
		.sink1_channel       (cmd_demux_002_src2_channel),                              //          .channel
		.sink1_data          (cmd_demux_002_src2_data),                                 //          .data
		.sink1_startofpacket (cmd_demux_002_src2_startofpacket),                        //          .startofpacket
		.sink1_endofpacket   (cmd_demux_002_src2_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_003 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_003_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_003_src_valid),                                   //          .valid
		.src_data            (cmd_mux_003_src_data),                                    //          .data
		.src_channel         (cmd_mux_003_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_003_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_003_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src3_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src3_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src3_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src3_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src3_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src3_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_004 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_004_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_004_src_valid),                                   //          .valid
		.src_data            (cmd_mux_004_src_data),                                    //          .data
		.src_channel         (cmd_mux_004_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_004_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_004_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src4_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src4_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src4_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src4_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src4_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src4_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_005 (
		.clk                 (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset               (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_005_src_ready),                                            //       src.ready
		.src_valid           (cmd_mux_005_src_valid),                                            //          .valid
		.src_data            (cmd_mux_005_src_data),                                             //          .data
		.src_channel         (cmd_mux_005_src_channel),                                          //          .channel
		.src_startofpacket   (cmd_mux_005_src_startofpacket),                                    //          .startofpacket
		.src_endofpacket     (cmd_mux_005_src_endofpacket),                                      //          .endofpacket
		.sink0_ready         (crosser_out_ready),                                                //     sink0.ready
		.sink0_valid         (crosser_out_valid),                                                //          .valid
		.sink0_channel       (crosser_out_channel),                                              //          .channel
		.sink0_data          (crosser_out_data),                                                 //          .data
		.sink0_startofpacket (crosser_out_startofpacket),                                        //          .startofpacket
		.sink0_endofpacket   (crosser_out_endofpacket)                                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_006 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_006_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_006_src_valid),                                   //          .valid
		.src_data            (cmd_mux_006_src_data),                                    //          .data
		.src_channel         (cmd_mux_006_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_006_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_006_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src6_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src6_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src6_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src6_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src6_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src6_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_007 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_007_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_007_src_valid),                                   //          .valid
		.src_data            (cmd_mux_007_src_data),                                    //          .data
		.src_channel         (cmd_mux_007_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_007_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_007_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src7_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src7_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src7_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src7_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src7_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src7_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_008 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_008_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_008_src_valid),                                   //          .valid
		.src_data            (cmd_mux_008_src_data),                                    //          .data
		.src_channel         (cmd_mux_008_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_008_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_008_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src8_ready),                                //     sink0.ready
		.sink0_valid         (cmd_demux_001_src8_valid),                                //          .valid
		.sink0_channel       (cmd_demux_001_src8_channel),                              //          .channel
		.sink0_data          (cmd_demux_001_src8_data),                                 //          .data
		.sink0_startofpacket (cmd_demux_001_src8_startofpacket),                        //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src8_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_009 (
		.clk                 (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset               (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_009_src_ready),                                            //       src.ready
		.src_valid           (cmd_mux_009_src_valid),                                            //          .valid
		.src_data            (cmd_mux_009_src_data),                                             //          .data
		.src_channel         (cmd_mux_009_src_channel),                                          //          .channel
		.src_startofpacket   (cmd_mux_009_src_startofpacket),                                    //          .startofpacket
		.src_endofpacket     (cmd_mux_009_src_endofpacket),                                      //          .endofpacket
		.sink0_ready         (crosser_001_out_ready),                                            //     sink0.ready
		.sink0_valid         (crosser_001_out_valid),                                            //          .valid
		.sink0_channel       (crosser_001_out_channel),                                          //          .channel
		.sink0_data          (crosser_001_out_data),                                             //          .data
		.sink0_startofpacket (crosser_001_out_startofpacket),                                    //          .startofpacket
		.sink0_endofpacket   (crosser_001_out_endofpacket)                                       //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_010 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_010_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_010_src_valid),                                   //          .valid
		.src_data            (cmd_mux_010_src_data),                                    //          .data
		.src_channel         (cmd_mux_010_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_010_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_010_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src10_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src10_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src10_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src10_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src10_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src10_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_011 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_011_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_011_src_valid),                                   //          .valid
		.src_data            (cmd_mux_011_src_data),                                    //          .data
		.src_channel         (cmd_mux_011_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_011_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_011_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src11_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src11_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src11_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src11_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src11_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src11_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_012 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_012_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_012_src_valid),                                   //          .valid
		.src_data            (cmd_mux_012_src_data),                                    //          .data
		.src_channel         (cmd_mux_012_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_012_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_012_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src12_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src12_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src12_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src12_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src12_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src12_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_013 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_013_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_013_src_valid),                                   //          .valid
		.src_data            (cmd_mux_013_src_data),                                    //          .data
		.src_channel         (cmd_mux_013_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_013_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_013_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src13_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src13_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src13_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src13_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src13_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src13_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_014 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_014_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_014_src_valid),                                   //          .valid
		.src_data            (cmd_mux_014_src_data),                                    //          .data
		.src_channel         (cmd_mux_014_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_014_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_014_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src14_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src14_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src14_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src14_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src14_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src14_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_015 (
		.clk                 (u_i3c_clk_out_clk_clk),                               //       clk.clk
		.reset               (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_015_src_ready),                               //       src.ready
		.src_valid           (cmd_mux_015_src_valid),                               //          .valid
		.src_data            (cmd_mux_015_src_data),                                //          .data
		.src_channel         (cmd_mux_015_src_channel),                             //          .channel
		.src_startofpacket   (cmd_mux_015_src_startofpacket),                       //          .startofpacket
		.src_endofpacket     (cmd_mux_015_src_endofpacket),                         //          .endofpacket
		.sink0_ready         (crosser_002_out_ready),                               //     sink0.ready
		.sink0_valid         (crosser_002_out_valid),                               //          .valid
		.sink0_channel       (crosser_002_out_channel),                             //          .channel
		.sink0_data          (crosser_002_out_data),                                //          .data
		.sink0_startofpacket (crosser_002_out_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (crosser_002_out_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_016 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_016_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_016_src_valid),                                   //          .valid
		.src_data            (cmd_mux_016_src_data),                                    //          .data
		.src_channel         (cmd_mux_016_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_016_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_016_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src16_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src16_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src16_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src16_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src16_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src16_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_017 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_017_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_017_src_valid),                                   //          .valid
		.src_data            (cmd_mux_017_src_data),                                    //          .data
		.src_channel         (cmd_mux_017_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_017_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_017_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src17_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src17_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src17_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src17_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src17_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src17_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_018 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_018_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_018_src_valid),                                   //          .valid
		.src_data            (cmd_mux_018_src_data),                                    //          .data
		.src_channel         (cmd_mux_018_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_018_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_018_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src18_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src18_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src18_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src18_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src18_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src18_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_019 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_019_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_019_src_valid),                                   //          .valid
		.src_data            (cmd_mux_019_src_data),                                    //          .data
		.src_channel         (cmd_mux_019_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_019_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_019_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src19_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src19_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src19_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src19_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src19_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src19_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_020 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_020_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_020_src_valid),                                   //          .valid
		.src_data            (cmd_mux_020_src_data),                                    //          .data
		.src_channel         (cmd_mux_020_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_020_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_020_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src20_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src20_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src20_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src20_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src20_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src20_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_021 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_021_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_021_src_valid),                                   //          .valid
		.src_data            (cmd_mux_021_src_data),                                    //          .data
		.src_channel         (cmd_mux_021_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_021_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_021_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src21_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src21_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src21_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src21_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src21_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src21_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_022 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_022_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_022_src_valid),                                   //          .valid
		.src_data            (cmd_mux_022_src_data),                                    //          .data
		.src_channel         (cmd_mux_022_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_022_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_022_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src22_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src22_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src22_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src22_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src22_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src22_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_023 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_023_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_023_src_valid),                                   //          .valid
		.src_data            (cmd_mux_023_src_data),                                    //          .data
		.src_channel         (cmd_mux_023_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_023_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_023_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src23_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src23_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src23_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src23_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src23_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src23_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_024 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_024_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_024_src_valid),                                   //          .valid
		.src_data            (cmd_mux_024_src_data),                                    //          .data
		.src_channel         (cmd_mux_024_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_024_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_024_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src24_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src24_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src24_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src24_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src24_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src24_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_mux_003 cmd_mux_025 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_025_src_ready),                                   //       src.ready
		.src_valid           (cmd_mux_025_src_valid),                                   //          .valid
		.src_data            (cmd_mux_025_src_data),                                    //          .data
		.src_channel         (cmd_mux_025_src_channel),                                 //          .channel
		.src_startofpacket   (cmd_mux_025_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (cmd_mux_025_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (cmd_demux_001_src25_ready),                               //     sink0.ready
		.sink0_valid         (cmd_demux_001_src25_valid),                               //          .valid
		.sink0_channel       (cmd_demux_001_src25_channel),                             //          .channel
		.sink0_data          (cmd_demux_001_src25_data),                                //          .data
		.sink0_startofpacket (cmd_demux_001_src25_startofpacket),                       //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src25_endofpacket)                          //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux_002 rsp_demux (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_003_src_ready),                                    //      sink.ready
		.sink_channel       (router_003_src_channel),                                  //          .channel
		.sink_data          (router_003_src_data),                                     //          .data
		.sink_startofpacket (router_003_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_003_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_003_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_src0_ready),                                    //      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                                    //          .valid
		.src0_data          (rsp_demux_src0_data),                                     //          .data
		.src0_channel       (rsp_demux_src0_channel),                                  //          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),                            //          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket),                              //          .endofpacket
		.src1_ready         (rsp_demux_src1_ready),                                    //      src1.ready
		.src1_valid         (rsp_demux_src1_valid),                                    //          .valid
		.src1_data          (rsp_demux_src1_data),                                     //          .data
		.src1_channel       (rsp_demux_src1_channel),                                  //          .channel
		.src1_startofpacket (rsp_demux_src1_startofpacket),                            //          .startofpacket
		.src1_endofpacket   (rsp_demux_src1_endofpacket),                              //          .endofpacket
		.src2_ready         (rsp_demux_src2_ready),                                    //      src2.ready
		.src2_valid         (rsp_demux_src2_valid),                                    //          .valid
		.src2_data          (rsp_demux_src2_data),                                     //          .data
		.src2_channel       (rsp_demux_src2_channel),                                  //          .channel
		.src2_startofpacket (rsp_demux_src2_startofpacket),                            //          .startofpacket
		.src2_endofpacket   (rsp_demux_src2_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_demux_001 rsp_demux_001 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_004_src_ready),                                    //      sink.ready
		.sink_channel       (router_004_src_channel),                                  //          .channel
		.sink_data          (router_004_src_data),                                     //          .data
		.sink_startofpacket (router_004_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_004_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_004_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_001_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_001_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_001_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_001_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_001_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_001_src0_endofpacket),                          //          .endofpacket
		.src1_ready         (rsp_demux_001_src1_ready),                                //      src1.ready
		.src1_valid         (rsp_demux_001_src1_valid),                                //          .valid
		.src1_data          (rsp_demux_001_src1_data),                                 //          .data
		.src1_channel       (rsp_demux_001_src1_channel),                              //          .channel
		.src1_startofpacket (rsp_demux_001_src1_startofpacket),                        //          .startofpacket
		.src1_endofpacket   (rsp_demux_001_src1_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_demux_001 rsp_demux_002 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_005_src_ready),                                    //      sink.ready
		.sink_channel       (router_005_src_channel),                                  //          .channel
		.sink_data          (router_005_src_data),                                     //          .data
		.sink_startofpacket (router_005_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_005_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_005_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_002_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_002_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_002_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_002_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_002_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_002_src0_endofpacket),                          //          .endofpacket
		.src1_ready         (rsp_demux_002_src1_ready),                                //      src1.ready
		.src1_valid         (rsp_demux_002_src1_valid),                                //          .valid
		.src1_data          (rsp_demux_002_src1_data),                                 //          .data
		.src1_channel       (rsp_demux_002_src1_channel),                              //          .channel
		.src1_startofpacket (rsp_demux_002_src1_startofpacket),                        //          .startofpacket
		.src1_endofpacket   (rsp_demux_002_src1_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_003 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_006_src_ready),                                    //      sink.ready
		.sink_channel       (router_006_src_channel),                                  //          .channel
		.sink_data          (router_006_src_data),                                     //          .data
		.sink_startofpacket (router_006_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_006_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_006_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_003_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_003_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_003_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_003_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_003_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_003_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_004 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_007_src_ready),                                    //      sink.ready
		.sink_channel       (router_007_src_channel),                                  //          .channel
		.sink_data          (router_007_src_data),                                     //          .data
		.sink_startofpacket (router_007_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_007_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_007_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_004_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_004_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_004_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_004_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_004_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_004_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_demux_005 rsp_demux_005 (
		.clk                (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset              (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_008_src_ready),                                             //      sink.ready
		.sink_channel       (router_008_src_channel),                                           //          .channel
		.sink_data          (router_008_src_data),                                              //          .data
		.sink_startofpacket (router_008_src_startofpacket),                                     //          .startofpacket
		.sink_endofpacket   (router_008_src_endofpacket),                                       //          .endofpacket
		.sink_valid         (router_008_src_valid),                                             //          .valid
		.src0_ready         (rsp_demux_005_src0_ready),                                         //      src0.ready
		.src0_valid         (rsp_demux_005_src0_valid),                                         //          .valid
		.src0_data          (rsp_demux_005_src0_data),                                          //          .data
		.src0_channel       (rsp_demux_005_src0_channel),                                       //          .channel
		.src0_startofpacket (rsp_demux_005_src0_startofpacket),                                 //          .startofpacket
		.src0_endofpacket   (rsp_demux_005_src0_endofpacket)                                    //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_006 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_009_src_ready),                                    //      sink.ready
		.sink_channel       (router_009_src_channel),                                  //          .channel
		.sink_data          (router_009_src_data),                                     //          .data
		.sink_startofpacket (router_009_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_009_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_009_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_006_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_006_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_006_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_006_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_006_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_006_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_007 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_010_src_ready),                                    //      sink.ready
		.sink_channel       (router_010_src_channel),                                  //          .channel
		.sink_data          (router_010_src_data),                                     //          .data
		.sink_startofpacket (router_010_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_010_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_010_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_007_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_007_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_007_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_007_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_007_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_007_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_008 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_011_src_ready),                                    //      sink.ready
		.sink_channel       (router_011_src_channel),                                  //          .channel
		.sink_data          (router_011_src_data),                                     //          .data
		.sink_startofpacket (router_011_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_011_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_011_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_008_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_008_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_008_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_008_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_008_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_008_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_demux_005 rsp_demux_009 (
		.clk                (u_spi_clk_out_clk_clk),                                            //       clk.clk
		.reset              (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_012_src_ready),                                             //      sink.ready
		.sink_channel       (router_012_src_channel),                                           //          .channel
		.sink_data          (router_012_src_data),                                              //          .data
		.sink_startofpacket (router_012_src_startofpacket),                                     //          .startofpacket
		.sink_endofpacket   (router_012_src_endofpacket),                                       //          .endofpacket
		.sink_valid         (router_012_src_valid),                                             //          .valid
		.src0_ready         (rsp_demux_009_src0_ready),                                         //      src0.ready
		.src0_valid         (rsp_demux_009_src0_valid),                                         //          .valid
		.src0_data          (rsp_demux_009_src0_data),                                          //          .data
		.src0_channel       (rsp_demux_009_src0_channel),                                       //          .channel
		.src0_startofpacket (rsp_demux_009_src0_startofpacket),                                 //          .startofpacket
		.src0_endofpacket   (rsp_demux_009_src0_endofpacket)                                    //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_010 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_013_src_ready),                                    //      sink.ready
		.sink_channel       (router_013_src_channel),                                  //          .channel
		.sink_data          (router_013_src_data),                                     //          .data
		.sink_startofpacket (router_013_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_013_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_013_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_010_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_010_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_010_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_010_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_010_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_010_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_011 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_014_src_ready),                                    //      sink.ready
		.sink_channel       (router_014_src_channel),                                  //          .channel
		.sink_data          (router_014_src_data),                                     //          .data
		.sink_startofpacket (router_014_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_014_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_014_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_011_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_011_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_011_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_011_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_011_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_011_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_012 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_015_src_ready),                                    //      sink.ready
		.sink_channel       (router_015_src_channel),                                  //          .channel
		.sink_data          (router_015_src_data),                                     //          .data
		.sink_startofpacket (router_015_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_015_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_015_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_012_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_012_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_012_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_012_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_012_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_012_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_013 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_016_src_ready),                                    //      sink.ready
		.sink_channel       (router_016_src_channel),                                  //          .channel
		.sink_data          (router_016_src_data),                                     //          .data
		.sink_startofpacket (router_016_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_016_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_016_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_013_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_013_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_013_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_013_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_013_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_013_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_014 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_017_src_ready),                                    //      sink.ready
		.sink_channel       (router_017_src_channel),                                  //          .channel
		.sink_data          (router_017_src_data),                                     //          .data
		.sink_startofpacket (router_017_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_017_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_017_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_014_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_014_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_014_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_014_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_014_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_014_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_demux_015 rsp_demux_015 (
		.clk                (u_i3c_clk_out_clk_clk),                               //       clk.clk
		.reset              (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_018_src_ready),                                //      sink.ready
		.sink_channel       (router_018_src_channel),                              //          .channel
		.sink_data          (router_018_src_data),                                 //          .data
		.sink_startofpacket (router_018_src_startofpacket),                        //          .startofpacket
		.sink_endofpacket   (router_018_src_endofpacket),                          //          .endofpacket
		.sink_valid         (router_018_src_valid),                                //          .valid
		.src0_ready         (rsp_demux_015_src0_ready),                            //      src0.ready
		.src0_valid         (rsp_demux_015_src0_valid),                            //          .valid
		.src0_data          (rsp_demux_015_src0_data),                             //          .data
		.src0_channel       (rsp_demux_015_src0_channel),                          //          .channel
		.src0_startofpacket (rsp_demux_015_src0_startofpacket),                    //          .startofpacket
		.src0_endofpacket   (rsp_demux_015_src0_endofpacket)                       //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_016 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_019_src_ready),                                    //      sink.ready
		.sink_channel       (router_019_src_channel),                                  //          .channel
		.sink_data          (router_019_src_data),                                     //          .data
		.sink_startofpacket (router_019_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_019_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_019_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_016_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_016_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_016_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_016_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_016_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_016_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_017 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_020_src_ready),                                    //      sink.ready
		.sink_channel       (router_020_src_channel),                                  //          .channel
		.sink_data          (router_020_src_data),                                     //          .data
		.sink_startofpacket (router_020_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_020_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_020_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_017_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_017_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_017_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_017_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_017_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_017_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_018 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_021_src_ready),                                    //      sink.ready
		.sink_channel       (router_021_src_channel),                                  //          .channel
		.sink_data          (router_021_src_data),                                     //          .data
		.sink_startofpacket (router_021_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_021_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_021_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_018_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_018_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_018_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_018_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_018_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_018_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_019 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_022_src_ready),                                    //      sink.ready
		.sink_channel       (router_022_src_channel),                                  //          .channel
		.sink_data          (router_022_src_data),                                     //          .data
		.sink_startofpacket (router_022_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_022_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_022_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_019_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_019_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_019_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_019_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_019_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_019_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_020 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_023_src_ready),                                    //      sink.ready
		.sink_channel       (router_023_src_channel),                                  //          .channel
		.sink_data          (router_023_src_data),                                     //          .data
		.sink_startofpacket (router_023_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_023_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_023_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_020_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_020_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_020_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_020_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_020_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_020_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_021 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_024_src_ready),                                    //      sink.ready
		.sink_channel       (router_024_src_channel),                                  //          .channel
		.sink_data          (router_024_src_data),                                     //          .data
		.sink_startofpacket (router_024_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_024_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_024_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_021_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_021_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_021_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_021_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_021_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_021_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_022 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_025_src_ready),                                    //      sink.ready
		.sink_channel       (router_025_src_channel),                                  //          .channel
		.sink_data          (router_025_src_data),                                     //          .data
		.sink_startofpacket (router_025_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_025_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_025_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_022_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_022_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_022_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_022_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_022_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_022_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_023 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_026_src_ready),                                    //      sink.ready
		.sink_channel       (router_026_src_channel),                                  //          .channel
		.sink_data          (router_026_src_data),                                     //          .data
		.sink_startofpacket (router_026_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_026_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_026_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_023_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_023_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_023_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_023_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_023_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_023_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_024 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_027_src_ready),                                    //      sink.ready
		.sink_channel       (router_027_src_channel),                                  //          .channel
		.sink_data          (router_027_src_data),                                     //          .data
		.sink_startofpacket (router_027_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_027_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_027_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_024_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_024_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_024_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_024_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_024_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_024_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_cmd_demux rsp_demux_025 (
		.clk                (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset              (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_028_src_ready),                                    //      sink.ready
		.sink_channel       (router_028_src_channel),                                  //          .channel
		.sink_data          (router_028_src_data),                                     //          .data
		.sink_startofpacket (router_028_src_startofpacket),                            //          .startofpacket
		.sink_endofpacket   (router_028_src_endofpacket),                              //          .endofpacket
		.sink_valid         (router_028_src_valid),                                    //          .valid
		.src0_ready         (rsp_demux_025_src0_ready),                                //      src0.ready
		.src0_valid         (rsp_demux_025_src0_valid),                                //          .valid
		.src0_data          (rsp_demux_025_src0_data),                                 //          .data
		.src0_channel       (rsp_demux_025_src0_channel),                              //          .channel
		.src0_startofpacket (rsp_demux_025_src0_startofpacket),                        //          .startofpacket
		.src0_endofpacket   (rsp_demux_025_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_mux rsp_mux (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (rsp_mux_src_ready),                                       //       src.ready
		.src_valid           (rsp_mux_src_valid),                                       //          .valid
		.src_data            (rsp_mux_src_data),                                        //          .data
		.src_channel         (rsp_mux_src_channel),                                     //          .channel
		.src_startofpacket   (rsp_mux_src_startofpacket),                               //          .startofpacket
		.src_endofpacket     (rsp_mux_src_endofpacket),                                 //          .endofpacket
		.sink0_ready         (rsp_demux_src0_ready),                                    //     sink0.ready
		.sink0_valid         (rsp_demux_src0_valid),                                    //          .valid
		.sink0_channel       (rsp_demux_src0_channel),                                  //          .channel
		.sink0_data          (rsp_demux_src0_data),                                     //          .data
		.sink0_startofpacket (rsp_demux_src0_startofpacket),                            //          .startofpacket
		.sink0_endofpacket   (rsp_demux_src0_endofpacket)                               //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_mux_001 rsp_mux_001 (
		.clk                  (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset                (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready            (rsp_mux_001_src_ready),                                   //       src.ready
		.src_valid            (rsp_mux_001_src_valid),                                   //          .valid
		.src_data             (rsp_mux_001_src_data),                                    //          .data
		.src_channel          (rsp_mux_001_src_channel),                                 //          .channel
		.src_startofpacket    (rsp_mux_001_src_startofpacket),                           //          .startofpacket
		.src_endofpacket      (rsp_mux_001_src_endofpacket),                             //          .endofpacket
		.sink0_ready          (rsp_demux_src1_ready),                                    //     sink0.ready
		.sink0_valid          (rsp_demux_src1_valid),                                    //          .valid
		.sink0_channel        (rsp_demux_src1_channel),                                  //          .channel
		.sink0_data           (rsp_demux_src1_data),                                     //          .data
		.sink0_startofpacket  (rsp_demux_src1_startofpacket),                            //          .startofpacket
		.sink0_endofpacket    (rsp_demux_src1_endofpacket),                              //          .endofpacket
		.sink1_ready          (rsp_demux_001_src0_ready),                                //     sink1.ready
		.sink1_valid          (rsp_demux_001_src0_valid),                                //          .valid
		.sink1_channel        (rsp_demux_001_src0_channel),                              //          .channel
		.sink1_data           (rsp_demux_001_src0_data),                                 //          .data
		.sink1_startofpacket  (rsp_demux_001_src0_startofpacket),                        //          .startofpacket
		.sink1_endofpacket    (rsp_demux_001_src0_endofpacket),                          //          .endofpacket
		.sink2_ready          (rsp_demux_002_src0_ready),                                //     sink2.ready
		.sink2_valid          (rsp_demux_002_src0_valid),                                //          .valid
		.sink2_channel        (rsp_demux_002_src0_channel),                              //          .channel
		.sink2_data           (rsp_demux_002_src0_data),                                 //          .data
		.sink2_startofpacket  (rsp_demux_002_src0_startofpacket),                        //          .startofpacket
		.sink2_endofpacket    (rsp_demux_002_src0_endofpacket),                          //          .endofpacket
		.sink3_ready          (rsp_demux_003_src0_ready),                                //     sink3.ready
		.sink3_valid          (rsp_demux_003_src0_valid),                                //          .valid
		.sink3_channel        (rsp_demux_003_src0_channel),                              //          .channel
		.sink3_data           (rsp_demux_003_src0_data),                                 //          .data
		.sink3_startofpacket  (rsp_demux_003_src0_startofpacket),                        //          .startofpacket
		.sink3_endofpacket    (rsp_demux_003_src0_endofpacket),                          //          .endofpacket
		.sink4_ready          (rsp_demux_004_src0_ready),                                //     sink4.ready
		.sink4_valid          (rsp_demux_004_src0_valid),                                //          .valid
		.sink4_channel        (rsp_demux_004_src0_channel),                              //          .channel
		.sink4_data           (rsp_demux_004_src0_data),                                 //          .data
		.sink4_startofpacket  (rsp_demux_004_src0_startofpacket),                        //          .startofpacket
		.sink4_endofpacket    (rsp_demux_004_src0_endofpacket),                          //          .endofpacket
		.sink5_ready          (crosser_003_out_ready),                                   //     sink5.ready
		.sink5_valid          (crosser_003_out_valid),                                   //          .valid
		.sink5_channel        (crosser_003_out_channel),                                 //          .channel
		.sink5_data           (crosser_003_out_data),                                    //          .data
		.sink5_startofpacket  (crosser_003_out_startofpacket),                           //          .startofpacket
		.sink5_endofpacket    (crosser_003_out_endofpacket),                             //          .endofpacket
		.sink6_ready          (rsp_demux_006_src0_ready),                                //     sink6.ready
		.sink6_valid          (rsp_demux_006_src0_valid),                                //          .valid
		.sink6_channel        (rsp_demux_006_src0_channel),                              //          .channel
		.sink6_data           (rsp_demux_006_src0_data),                                 //          .data
		.sink6_startofpacket  (rsp_demux_006_src0_startofpacket),                        //          .startofpacket
		.sink6_endofpacket    (rsp_demux_006_src0_endofpacket),                          //          .endofpacket
		.sink7_ready          (rsp_demux_007_src0_ready),                                //     sink7.ready
		.sink7_valid          (rsp_demux_007_src0_valid),                                //          .valid
		.sink7_channel        (rsp_demux_007_src0_channel),                              //          .channel
		.sink7_data           (rsp_demux_007_src0_data),                                 //          .data
		.sink7_startofpacket  (rsp_demux_007_src0_startofpacket),                        //          .startofpacket
		.sink7_endofpacket    (rsp_demux_007_src0_endofpacket),                          //          .endofpacket
		.sink8_ready          (rsp_demux_008_src0_ready),                                //     sink8.ready
		.sink8_valid          (rsp_demux_008_src0_valid),                                //          .valid
		.sink8_channel        (rsp_demux_008_src0_channel),                              //          .channel
		.sink8_data           (rsp_demux_008_src0_data),                                 //          .data
		.sink8_startofpacket  (rsp_demux_008_src0_startofpacket),                        //          .startofpacket
		.sink8_endofpacket    (rsp_demux_008_src0_endofpacket),                          //          .endofpacket
		.sink9_ready          (crosser_004_out_ready),                                   //     sink9.ready
		.sink9_valid          (crosser_004_out_valid),                                   //          .valid
		.sink9_channel        (crosser_004_out_channel),                                 //          .channel
		.sink9_data           (crosser_004_out_data),                                    //          .data
		.sink9_startofpacket  (crosser_004_out_startofpacket),                           //          .startofpacket
		.sink9_endofpacket    (crosser_004_out_endofpacket),                             //          .endofpacket
		.sink10_ready         (rsp_demux_010_src0_ready),                                //    sink10.ready
		.sink10_valid         (rsp_demux_010_src0_valid),                                //          .valid
		.sink10_channel       (rsp_demux_010_src0_channel),                              //          .channel
		.sink10_data          (rsp_demux_010_src0_data),                                 //          .data
		.sink10_startofpacket (rsp_demux_010_src0_startofpacket),                        //          .startofpacket
		.sink10_endofpacket   (rsp_demux_010_src0_endofpacket),                          //          .endofpacket
		.sink11_ready         (rsp_demux_011_src0_ready),                                //    sink11.ready
		.sink11_valid         (rsp_demux_011_src0_valid),                                //          .valid
		.sink11_channel       (rsp_demux_011_src0_channel),                              //          .channel
		.sink11_data          (rsp_demux_011_src0_data),                                 //          .data
		.sink11_startofpacket (rsp_demux_011_src0_startofpacket),                        //          .startofpacket
		.sink11_endofpacket   (rsp_demux_011_src0_endofpacket),                          //          .endofpacket
		.sink12_ready         (rsp_demux_012_src0_ready),                                //    sink12.ready
		.sink12_valid         (rsp_demux_012_src0_valid),                                //          .valid
		.sink12_channel       (rsp_demux_012_src0_channel),                              //          .channel
		.sink12_data          (rsp_demux_012_src0_data),                                 //          .data
		.sink12_startofpacket (rsp_demux_012_src0_startofpacket),                        //          .startofpacket
		.sink12_endofpacket   (rsp_demux_012_src0_endofpacket),                          //          .endofpacket
		.sink13_ready         (rsp_demux_013_src0_ready),                                //    sink13.ready
		.sink13_valid         (rsp_demux_013_src0_valid),                                //          .valid
		.sink13_channel       (rsp_demux_013_src0_channel),                              //          .channel
		.sink13_data          (rsp_demux_013_src0_data),                                 //          .data
		.sink13_startofpacket (rsp_demux_013_src0_startofpacket),                        //          .startofpacket
		.sink13_endofpacket   (rsp_demux_013_src0_endofpacket),                          //          .endofpacket
		.sink14_ready         (rsp_demux_014_src0_ready),                                //    sink14.ready
		.sink14_valid         (rsp_demux_014_src0_valid),                                //          .valid
		.sink14_channel       (rsp_demux_014_src0_channel),                              //          .channel
		.sink14_data          (rsp_demux_014_src0_data),                                 //          .data
		.sink14_startofpacket (rsp_demux_014_src0_startofpacket),                        //          .startofpacket
		.sink14_endofpacket   (rsp_demux_014_src0_endofpacket),                          //          .endofpacket
		.sink15_ready         (crosser_005_out_ready),                                   //    sink15.ready
		.sink15_valid         (crosser_005_out_valid),                                   //          .valid
		.sink15_channel       (crosser_005_out_channel),                                 //          .channel
		.sink15_data          (crosser_005_out_data),                                    //          .data
		.sink15_startofpacket (crosser_005_out_startofpacket),                           //          .startofpacket
		.sink15_endofpacket   (crosser_005_out_endofpacket),                             //          .endofpacket
		.sink16_ready         (rsp_demux_016_src0_ready),                                //    sink16.ready
		.sink16_valid         (rsp_demux_016_src0_valid),                                //          .valid
		.sink16_channel       (rsp_demux_016_src0_channel),                              //          .channel
		.sink16_data          (rsp_demux_016_src0_data),                                 //          .data
		.sink16_startofpacket (rsp_demux_016_src0_startofpacket),                        //          .startofpacket
		.sink16_endofpacket   (rsp_demux_016_src0_endofpacket),                          //          .endofpacket
		.sink17_ready         (rsp_demux_017_src0_ready),                                //    sink17.ready
		.sink17_valid         (rsp_demux_017_src0_valid),                                //          .valid
		.sink17_channel       (rsp_demux_017_src0_channel),                              //          .channel
		.sink17_data          (rsp_demux_017_src0_data),                                 //          .data
		.sink17_startofpacket (rsp_demux_017_src0_startofpacket),                        //          .startofpacket
		.sink17_endofpacket   (rsp_demux_017_src0_endofpacket),                          //          .endofpacket
		.sink18_ready         (rsp_demux_018_src0_ready),                                //    sink18.ready
		.sink18_valid         (rsp_demux_018_src0_valid),                                //          .valid
		.sink18_channel       (rsp_demux_018_src0_channel),                              //          .channel
		.sink18_data          (rsp_demux_018_src0_data),                                 //          .data
		.sink18_startofpacket (rsp_demux_018_src0_startofpacket),                        //          .startofpacket
		.sink18_endofpacket   (rsp_demux_018_src0_endofpacket),                          //          .endofpacket
		.sink19_ready         (rsp_demux_019_src0_ready),                                //    sink19.ready
		.sink19_valid         (rsp_demux_019_src0_valid),                                //          .valid
		.sink19_channel       (rsp_demux_019_src0_channel),                              //          .channel
		.sink19_data          (rsp_demux_019_src0_data),                                 //          .data
		.sink19_startofpacket (rsp_demux_019_src0_startofpacket),                        //          .startofpacket
		.sink19_endofpacket   (rsp_demux_019_src0_endofpacket),                          //          .endofpacket
		.sink20_ready         (rsp_demux_020_src0_ready),                                //    sink20.ready
		.sink20_valid         (rsp_demux_020_src0_valid),                                //          .valid
		.sink20_channel       (rsp_demux_020_src0_channel),                              //          .channel
		.sink20_data          (rsp_demux_020_src0_data),                                 //          .data
		.sink20_startofpacket (rsp_demux_020_src0_startofpacket),                        //          .startofpacket
		.sink20_endofpacket   (rsp_demux_020_src0_endofpacket),                          //          .endofpacket
		.sink21_ready         (rsp_demux_021_src0_ready),                                //    sink21.ready
		.sink21_valid         (rsp_demux_021_src0_valid),                                //          .valid
		.sink21_channel       (rsp_demux_021_src0_channel),                              //          .channel
		.sink21_data          (rsp_demux_021_src0_data),                                 //          .data
		.sink21_startofpacket (rsp_demux_021_src0_startofpacket),                        //          .startofpacket
		.sink21_endofpacket   (rsp_demux_021_src0_endofpacket),                          //          .endofpacket
		.sink22_ready         (rsp_demux_022_src0_ready),                                //    sink22.ready
		.sink22_valid         (rsp_demux_022_src0_valid),                                //          .valid
		.sink22_channel       (rsp_demux_022_src0_channel),                              //          .channel
		.sink22_data          (rsp_demux_022_src0_data),                                 //          .data
		.sink22_startofpacket (rsp_demux_022_src0_startofpacket),                        //          .startofpacket
		.sink22_endofpacket   (rsp_demux_022_src0_endofpacket),                          //          .endofpacket
		.sink23_ready         (rsp_demux_023_src0_ready),                                //    sink23.ready
		.sink23_valid         (rsp_demux_023_src0_valid),                                //          .valid
		.sink23_channel       (rsp_demux_023_src0_channel),                              //          .channel
		.sink23_data          (rsp_demux_023_src0_data),                                 //          .data
		.sink23_startofpacket (rsp_demux_023_src0_startofpacket),                        //          .startofpacket
		.sink23_endofpacket   (rsp_demux_023_src0_endofpacket),                          //          .endofpacket
		.sink24_ready         (rsp_demux_024_src0_ready),                                //    sink24.ready
		.sink24_valid         (rsp_demux_024_src0_valid),                                //          .valid
		.sink24_channel       (rsp_demux_024_src0_channel),                              //          .channel
		.sink24_data          (rsp_demux_024_src0_data),                                 //          .data
		.sink24_startofpacket (rsp_demux_024_src0_startofpacket),                        //          .startofpacket
		.sink24_endofpacket   (rsp_demux_024_src0_endofpacket),                          //          .endofpacket
		.sink25_ready         (rsp_demux_025_src0_ready),                                //    sink25.ready
		.sink25_valid         (rsp_demux_025_src0_valid),                                //          .valid
		.sink25_channel       (rsp_demux_025_src0_channel),                              //          .channel
		.sink25_data          (rsp_demux_025_src0_data),                                 //          .data
		.sink25_startofpacket (rsp_demux_025_src0_startofpacket),                        //          .startofpacket
		.sink25_endofpacket   (rsp_demux_025_src0_endofpacket)                           //          .endofpacket
	);

	pfr_sys_mm_interconnect_0_rsp_mux_002 rsp_mux_002 (
		.clk                 (u_sys_clk_out_clk_clk),                                   //       clk.clk
		.reset               (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (rsp_mux_002_src_ready),                                   //       src.ready
		.src_valid           (rsp_mux_002_src_valid),                                   //          .valid
		.src_data            (rsp_mux_002_src_data),                                    //          .data
		.src_channel         (rsp_mux_002_src_channel),                                 //          .channel
		.src_startofpacket   (rsp_mux_002_src_startofpacket),                           //          .startofpacket
		.src_endofpacket     (rsp_mux_002_src_endofpacket),                             //          .endofpacket
		.sink0_ready         (rsp_demux_src2_ready),                                    //     sink0.ready
		.sink0_valid         (rsp_demux_src2_valid),                                    //          .valid
		.sink0_channel       (rsp_demux_src2_channel),                                  //          .channel
		.sink0_data          (rsp_demux_src2_data),                                     //          .data
		.sink0_startofpacket (rsp_demux_src2_startofpacket),                            //          .startofpacket
		.sink0_endofpacket   (rsp_demux_src2_endofpacket),                              //          .endofpacket
		.sink1_ready         (rsp_demux_001_src1_ready),                                //     sink1.ready
		.sink1_valid         (rsp_demux_001_src1_valid),                                //          .valid
		.sink1_channel       (rsp_demux_001_src1_channel),                              //          .channel
		.sink1_data          (rsp_demux_001_src1_data),                                 //          .data
		.sink1_startofpacket (rsp_demux_001_src1_startofpacket),                        //          .startofpacket
		.sink1_endofpacket   (rsp_demux_001_src1_endofpacket),                          //          .endofpacket
		.sink2_ready         (rsp_demux_002_src1_ready),                                //     sink2.ready
		.sink2_valid         (rsp_demux_002_src1_valid),                                //          .valid
		.sink2_channel       (rsp_demux_002_src1_channel),                              //          .channel
		.sink2_data          (rsp_demux_002_src1_data),                                 //          .data
		.sink2_startofpacket (rsp_demux_002_src1_startofpacket),                        //          .startofpacket
		.sink2_endofpacket   (rsp_demux_002_src1_endofpacket)                           //          .endofpacket
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser (
		.in_clk            (u_sys_clk_out_clk_clk),                                            //        in_clk.clk
		.in_reset          (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),          //  in_clk_reset.reset
		.out_clk           (u_spi_clk_out_clk_clk),                                            //       out_clk.clk
		.out_reset         (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // out_clk_reset.reset
		.in_ready          (cmd_demux_001_src5_ready),                                         //            in.ready
		.in_valid          (cmd_demux_001_src5_valid),                                         //              .valid
		.in_startofpacket  (cmd_demux_001_src5_startofpacket),                                 //              .startofpacket
		.in_endofpacket    (cmd_demux_001_src5_endofpacket),                                   //              .endofpacket
		.in_channel        (cmd_demux_001_src5_channel),                                       //              .channel
		.in_data           (cmd_demux_001_src5_data),                                          //              .data
		.out_ready         (crosser_out_ready),                                                //           out.ready
		.out_valid         (crosser_out_valid),                                                //              .valid
		.out_startofpacket (crosser_out_startofpacket),                                        //              .startofpacket
		.out_endofpacket   (crosser_out_endofpacket),                                          //              .endofpacket
		.out_channel       (crosser_out_channel),                                              //              .channel
		.out_data          (crosser_out_data),                                                 //              .data
		.in_empty          (1'b0),                                                             //   (terminated)
		.in_error          (1'b0),                                                             //   (terminated)
		.out_empty         (),                                                                 //   (terminated)
		.out_error         ()                                                                  //   (terminated)
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser_001 (
		.in_clk            (u_sys_clk_out_clk_clk),                                            //        in_clk.clk
		.in_reset          (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),          //  in_clk_reset.reset
		.out_clk           (u_spi_clk_out_clk_clk),                                            //       out_clk.clk
		.out_reset         (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // out_clk_reset.reset
		.in_ready          (cmd_demux_001_src9_ready),                                         //            in.ready
		.in_valid          (cmd_demux_001_src9_valid),                                         //              .valid
		.in_startofpacket  (cmd_demux_001_src9_startofpacket),                                 //              .startofpacket
		.in_endofpacket    (cmd_demux_001_src9_endofpacket),                                   //              .endofpacket
		.in_channel        (cmd_demux_001_src9_channel),                                       //              .channel
		.in_data           (cmd_demux_001_src9_data),                                          //              .data
		.out_ready         (crosser_001_out_ready),                                            //           out.ready
		.out_valid         (crosser_001_out_valid),                                            //              .valid
		.out_startofpacket (crosser_001_out_startofpacket),                                    //              .startofpacket
		.out_endofpacket   (crosser_001_out_endofpacket),                                      //              .endofpacket
		.out_channel       (crosser_001_out_channel),                                          //              .channel
		.out_data          (crosser_001_out_data),                                             //              .data
		.in_empty          (1'b0),                                                             //   (terminated)
		.in_error          (1'b0),                                                             //   (terminated)
		.out_empty         (),                                                                 //   (terminated)
		.out_error         ()                                                                  //   (terminated)
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser_002 (
		.in_clk            (u_sys_clk_out_clk_clk),                                   //        in_clk.clk
		.in_reset          (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //  in_clk_reset.reset
		.out_clk           (u_i3c_clk_out_clk_clk),                                   //       out_clk.clk
		.out_reset         (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset),     // out_clk_reset.reset
		.in_ready          (cmd_demux_001_src15_ready),                               //            in.ready
		.in_valid          (cmd_demux_001_src15_valid),                               //              .valid
		.in_startofpacket  (cmd_demux_001_src15_startofpacket),                       //              .startofpacket
		.in_endofpacket    (cmd_demux_001_src15_endofpacket),                         //              .endofpacket
		.in_channel        (cmd_demux_001_src15_channel),                             //              .channel
		.in_data           (cmd_demux_001_src15_data),                                //              .data
		.out_ready         (crosser_002_out_ready),                                   //           out.ready
		.out_valid         (crosser_002_out_valid),                                   //              .valid
		.out_startofpacket (crosser_002_out_startofpacket),                           //              .startofpacket
		.out_endofpacket   (crosser_002_out_endofpacket),                             //              .endofpacket
		.out_channel       (crosser_002_out_channel),                                 //              .channel
		.out_data          (crosser_002_out_data),                                    //              .data
		.in_empty          (1'b0),                                                    //   (terminated)
		.in_error          (1'b0),                                                    //   (terminated)
		.out_empty         (),                                                        //   (terminated)
		.out_error         ()                                                         //   (terminated)
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser_003 (
		.in_clk            (u_spi_clk_out_clk_clk),                                            //        in_clk.clk
		.in_reset          (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //  in_clk_reset.reset
		.out_clk           (u_sys_clk_out_clk_clk),                                            //       out_clk.clk
		.out_reset         (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),          // out_clk_reset.reset
		.in_ready          (rsp_demux_005_src0_ready),                                         //            in.ready
		.in_valid          (rsp_demux_005_src0_valid),                                         //              .valid
		.in_startofpacket  (rsp_demux_005_src0_startofpacket),                                 //              .startofpacket
		.in_endofpacket    (rsp_demux_005_src0_endofpacket),                                   //              .endofpacket
		.in_channel        (rsp_demux_005_src0_channel),                                       //              .channel
		.in_data           (rsp_demux_005_src0_data),                                          //              .data
		.out_ready         (crosser_003_out_ready),                                            //           out.ready
		.out_valid         (crosser_003_out_valid),                                            //              .valid
		.out_startofpacket (crosser_003_out_startofpacket),                                    //              .startofpacket
		.out_endofpacket   (crosser_003_out_endofpacket),                                      //              .endofpacket
		.out_channel       (crosser_003_out_channel),                                          //              .channel
		.out_data          (crosser_003_out_data),                                             //              .data
		.in_empty          (1'b0),                                                             //   (terminated)
		.in_error          (1'b0),                                                             //   (terminated)
		.out_empty         (),                                                                 //   (terminated)
		.out_error         ()                                                                  //   (terminated)
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser_004 (
		.in_clk            (u_spi_clk_out_clk_clk),                                            //        in_clk.clk
		.in_reset          (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), //  in_clk_reset.reset
		.out_clk           (u_sys_clk_out_clk_clk),                                            //       out_clk.clk
		.out_reset         (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),          // out_clk_reset.reset
		.in_ready          (rsp_demux_009_src0_ready),                                         //            in.ready
		.in_valid          (rsp_demux_009_src0_valid),                                         //              .valid
		.in_startofpacket  (rsp_demux_009_src0_startofpacket),                                 //              .startofpacket
		.in_endofpacket    (rsp_demux_009_src0_endofpacket),                                   //              .endofpacket
		.in_channel        (rsp_demux_009_src0_channel),                                       //              .channel
		.in_data           (rsp_demux_009_src0_data),                                          //              .data
		.out_ready         (crosser_004_out_ready),                                            //           out.ready
		.out_valid         (crosser_004_out_valid),                                            //              .valid
		.out_startofpacket (crosser_004_out_startofpacket),                                    //              .startofpacket
		.out_endofpacket   (crosser_004_out_endofpacket),                                      //              .endofpacket
		.out_channel       (crosser_004_out_channel),                                          //              .channel
		.out_data          (crosser_004_out_data),                                             //              .data
		.in_empty          (1'b0),                                                             //   (terminated)
		.in_error          (1'b0),                                                             //   (terminated)
		.out_empty         (),                                                                 //   (terminated)
		.out_error         ()                                                                  //   (terminated)
	);

	altera_avalon_st_handshake_clock_crosser #(
		.DATA_WIDTH          (117),
		.BITS_PER_SYMBOL     (117),
		.USE_PACKETS         (1),
		.USE_CHANNEL         (1),
		.CHANNEL_WIDTH       (26),
		.USE_ERROR           (0),
		.ERROR_WIDTH         (1),
		.VALID_SYNC_DEPTH    (2),
		.READY_SYNC_DEPTH    (2),
		.USE_OUTPUT_PIPELINE (0)
	) crosser_005 (
		.in_clk            (u_i3c_clk_out_clk_clk),                                   //        in_clk.clk
		.in_reset          (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset),     //  in_clk_reset.reset
		.out_clk           (u_sys_clk_out_clk_clk),                                   //       out_clk.clk
		.out_reset         (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // out_clk_reset.reset
		.in_ready          (rsp_demux_015_src0_ready),                                //            in.ready
		.in_valid          (rsp_demux_015_src0_valid),                                //              .valid
		.in_startofpacket  (rsp_demux_015_src0_startofpacket),                        //              .startofpacket
		.in_endofpacket    (rsp_demux_015_src0_endofpacket),                          //              .endofpacket
		.in_channel        (rsp_demux_015_src0_channel),                              //              .channel
		.in_data           (rsp_demux_015_src0_data),                                 //              .data
		.out_ready         (crosser_005_out_ready),                                   //           out.ready
		.out_valid         (crosser_005_out_valid),                                   //              .valid
		.out_startofpacket (crosser_005_out_startofpacket),                           //              .startofpacket
		.out_endofpacket   (crosser_005_out_endofpacket),                             //              .endofpacket
		.out_channel       (crosser_005_out_channel),                                 //              .channel
		.out_data          (crosser_005_out_data),                                    //              .data
		.in_empty          (1'b0),                                                    //   (terminated)
		.in_error          (1'b0),                                                    //   (terminated)
		.out_empty         (),                                                        //   (terminated)
		.out_error         ()                                                         //   (terminated)
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_ufm_data_agent_rdata_fifo_src_data),                    //     in_0.data
		.in_0_valid     (u_ufm_data_agent_rdata_fifo_src_valid),                   //         .valid
		.in_0_ready     (u_ufm_data_agent_rdata_fifo_src_ready),                   //         .ready
		.out_0_data     (avalon_st_adapter_out_0_data),                            //    out_0.data
		.out_0_valid    (avalon_st_adapter_out_0_valid),                           //         .valid
		.out_0_ready    (avalon_st_adapter_out_0_ready),                           //         .ready
		.out_0_error    (avalon_st_adapter_out_0_error)                            //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_001 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_nios_debug_mem_slave_agent_rdata_fifo_src_data),        //     in_0.data
		.in_0_valid     (u_nios_debug_mem_slave_agent_rdata_fifo_src_valid),       //         .valid
		.in_0_ready     (u_nios_debug_mem_slave_agent_rdata_fifo_src_ready),       //         .ready
		.out_0_data     (avalon_st_adapter_001_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_001_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_001_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_001_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_002 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_nios_ram_s1_agent_rdata_fifo_src_data),                 //     in_0.data
		.in_0_valid     (u_nios_ram_s1_agent_rdata_fifo_src_valid),                //         .valid
		.in_0_ready     (u_nios_ram_s1_agent_rdata_fifo_src_ready),                //         .ready
		.out_0_data     (avalon_st_adapter_002_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_002_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_002_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_002_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_003 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_dual_config_avalon_agent_rdata_fifo_src_data),          //     in_0.data
		.in_0_valid     (u_dual_config_avalon_agent_rdata_fifo_src_valid),         //         .valid
		.in_0_ready     (u_dual_config_avalon_agent_rdata_fifo_src_ready),         //         .ready
		.out_0_data     (avalon_st_adapter_003_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_003_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_003_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_003_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_004 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_data),     //     in_0.data
		.in_0_valid     (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_valid),    //         .valid
		.in_0_ready     (u_relay1_avmm_bridge_avmm_agent_rdata_fifo_src_ready),    //         .ready
		.out_0_data     (avalon_st_adapter_004_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_004_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_004_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_004_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_005 (
		.in_clk_0_clk   (u_spi_clk_out_clk_clk),                                            // in_clk_0.clk
		.in_rst_0_reset (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_data),    //     in_0.data
		.in_0_valid     (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_valid),   //         .valid
		.in_0_ready     (u_spi_filter_csr_avmm_bridge_0_avmm_agent_rdata_fifo_out_ready),   //         .ready
		.out_0_data     (avalon_st_adapter_005_out_0_data),                                 //    out_0.data
		.out_0_valid    (avalon_st_adapter_005_out_0_valid),                                //         .valid
		.out_0_ready    (avalon_st_adapter_005_out_0_ready),                                //         .ready
		.out_0_error    (avalon_st_adapter_005_out_0_error)                                 //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_006 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_data),     //     in_0.data
		.in_0_valid     (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_valid),    //         .valid
		.in_0_ready     (u_relay3_avmm_bridge_avmm_agent_rdata_fifo_src_ready),    //         .ready
		.out_0_data     (avalon_st_adapter_006_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_006_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_006_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_006_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_007 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_data),    //     in_0.data
		.in_0_valid     (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_valid),   //         .valid
		.in_0_ready     (u_mailbox_avmm_bridge_avmm_agent_rdata_fifo_src_ready),   //         .ready
		.out_0_data     (avalon_st_adapter_007_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_007_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_007_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_007_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_008 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_data),   //     in_0.data
		.in_0_valid     (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_valid),  //         .valid
		.in_0_ready     (u_rfnvram_smbus_master_avmm_agent_rdata_fifo_src_ready),  //         .ready
		.out_0_data     (avalon_st_adapter_008_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_008_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_008_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_008_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_009 (
		.in_clk_0_clk   (u_spi_clk_out_clk_clk),                                            // in_clk_0.clk
		.in_rst_0_reset (u_spi_filter_csr_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_data),          //     in_0.data
		.in_0_valid     (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_valid),         //         .valid
		.in_0_ready     (u_spi_filter_avmm_bridge_avmm_agent_rdata_fifo_out_ready),         //         .ready
		.out_0_data     (avalon_st_adapter_009_out_0_data),                                 //    out_0.data
		.out_0_valid    (avalon_st_adapter_009_out_0_valid),                                //         .valid
		.out_0_ready    (avalon_st_adapter_009_out_0_ready),                                //         .ready
		.out_0_error    (avalon_st_adapter_009_out_0_error)                                 //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_010 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                    // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),  // in_rst_0.reset
		.in_0_data      (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_timer_bank_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_010_out_0_data),                         //    out_0.data
		.out_0_valid    (avalon_st_adapter_010_out_0_valid),                        //         .valid
		.out_0_ready    (avalon_st_adapter_010_out_0_ready),                        //         .ready
		.out_0_error    (avalon_st_adapter_010_out_0_error)                         //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_011 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                    // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),  // in_rst_0.reset
		.in_0_data      (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_crypto_dma_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_011_out_0_data),                         //    out_0.data
		.out_0_valid    (avalon_st_adapter_011_out_0_valid),                        //         .valid
		.out_0_ready    (avalon_st_adapter_011_out_0_ready),                        //         .ready
		.out_0_error    (avalon_st_adapter_011_out_0_error)                         //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_012 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_data),     //     in_0.data
		.in_0_valid     (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_valid),    //         .valid
		.in_0_ready     (u_crypto_avmm_bridge_avmm_agent_rdata_fifo_src_ready),    //         .ready
		.out_0_data     (avalon_st_adapter_012_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_012_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_012_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_012_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_013 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                           // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),         // in_rst_0.reset
		.in_0_data      (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_spi_filter_bmc_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_013_out_0_data),                                //    out_0.data
		.out_0_valid    (avalon_st_adapter_013_out_0_valid),                               //         .valid
		.out_0_ready    (avalon_st_adapter_013_out_0_ready),                               //         .ready
		.out_0_error    (avalon_st_adapter_013_out_0_error)                                //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_014 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                 // in_rst_0.reset
		.in_0_data      (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_spi_filter_cpu0_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_014_out_0_data),                                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_014_out_0_valid),                                       //         .valid
		.out_0_ready    (avalon_st_adapter_014_out_0_ready),                                       //         .ready
		.out_0_error    (avalon_st_adapter_014_out_0_error)                                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_015 (
		.in_clk_0_clk   (u_i3c_clk_out_clk_clk),                               // in_clk_0.clk
		.in_rst_0_reset (u_i3c_avmm_bridge_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_data),    //     in_0.data
		.in_0_valid     (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_valid),   //         .valid
		.in_0_ready     (u_i3c_avmm_bridge_avmm_agent_rdata_fifo_out_ready),   //         .ready
		.out_0_data     (avalon_st_adapter_015_out_0_data),                    //    out_0.data
		.out_0_valid    (avalon_st_adapter_015_out_0_valid),                   //         .valid
		.out_0_ready    (avalon_st_adapter_015_out_0_ready),                   //         .ready
		.out_0_error    (avalon_st_adapter_015_out_0_error)                    //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_016 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                 // in_rst_0.reset
		.in_0_data      (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_spi_filter_cpu1_flash0_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_016_out_0_data),                                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_016_out_0_valid),                                       //         .valid
		.out_0_ready    (avalon_st_adapter_016_out_0_ready),                                       //         .ready
		.out_0_error    (avalon_st_adapter_016_out_0_error)                                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_017 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                 // in_rst_0.reset
		.in_0_data      (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_spi_filter_cpu0_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_017_out_0_data),                                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_017_out_0_valid),                                       //         .valid
		.out_0_ready    (avalon_st_adapter_017_out_0_ready),                                       //         .ready
		.out_0_error    (avalon_st_adapter_017_out_0_error)                                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_018 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset),                 // in_rst_0.reset
		.in_0_data      (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_data),  //     in_0.data
		.in_0_valid     (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_valid), //         .valid
		.in_0_ready     (u_spi_filter_cpu1_flash1_we_avmm_bridge_avmm_agent_rdata_fifo_src_ready), //         .ready
		.out_0_data     (avalon_st_adapter_018_out_0_data),                                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_018_out_0_valid),                                       //         .valid
		.out_0_ready    (avalon_st_adapter_018_out_0_ready),                                       //         .ready
		.out_0_error    (avalon_st_adapter_018_out_0_error)                                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_019 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_data),     //     in_0.data
		.in_0_valid     (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_valid),    //         .valid
		.in_0_ready     (u_relay2_avmm_bridge_avmm_agent_rdata_fifo_src_ready),    //         .ready
		.out_0_data     (avalon_st_adapter_019_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_019_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_019_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_019_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_020 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_data),        //     in_0.data
		.in_0_valid     (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_valid),       //         .valid
		.in_0_ready     (u_aes_avmm_bridge_avmm_agent_rdata_fifo_src_ready),       //         .ready
		.out_0_data     (avalon_st_adapter_020_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_020_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_020_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_020_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_021 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_ufm_csr_agent_rdata_fifo_src_data),                     //     in_0.data
		.in_0_valid     (u_ufm_csr_agent_rdata_fifo_src_valid),                    //         .valid
		.in_0_ready     (u_ufm_csr_agent_rdata_fifo_src_ready),                    //         .ready
		.out_0_data     (avalon_st_adapter_021_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_021_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_021_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_021_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_022 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_global_state_reg_s1_agent_rdata_fifo_src_data),         //     in_0.data
		.in_0_valid     (u_global_state_reg_s1_agent_rdata_fifo_src_valid),        //         .valid
		.in_0_ready     (u_global_state_reg_s1_agent_rdata_fifo_src_ready),        //         .ready
		.out_0_data     (avalon_st_adapter_022_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_022_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_022_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_022_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_023 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_gpo_1_s1_agent_rdata_fifo_src_data),                    //     in_0.data
		.in_0_valid     (u_gpo_1_s1_agent_rdata_fifo_src_valid),                   //         .valid
		.in_0_ready     (u_gpo_1_s1_agent_rdata_fifo_src_ready),                   //         .ready
		.out_0_data     (avalon_st_adapter_023_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_023_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_023_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_023_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_024 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_gpi_1_s1_agent_rdata_fifo_src_data),                    //     in_0.data
		.in_0_valid     (u_gpi_1_s1_agent_rdata_fifo_src_valid),                   //         .valid
		.in_0_ready     (u_gpi_1_s1_agent_rdata_fifo_src_ready),                   //         .ready
		.out_0_data     (avalon_st_adapter_024_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_024_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_024_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_024_out_0_error)                        //         .error
	);

	pfr_sys_mm_interconnect_0_avalon_st_adapter #(
		.inBitsPerSymbol (34),
		.inUsePackets    (0),
		.inDataWidth     (34),
		.inChannelWidth  (0),
		.inErrorWidth    (0),
		.inUseEmptyPort  (0),
		.inUseValid      (1),
		.inUseReady      (1),
		.inReadyLatency  (0),
		.outDataWidth    (34),
		.outChannelWidth (0),
		.outErrorWidth   (1),
		.outUseEmptyPort (0),
		.outUseValid     (1),
		.outUseReady     (1),
		.outReadyLatency (0)
	) avalon_st_adapter_025 (
		.in_clk_0_clk   (u_sys_clk_out_clk_clk),                                   // in_clk_0.clk
		.in_rst_0_reset (dma_ufm_avmm_bridge_0_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
		.in_0_data      (u_gpo_2_s1_agent_rdata_fifo_src_data),                    //     in_0.data
		.in_0_valid     (u_gpo_2_s1_agent_rdata_fifo_src_valid),                   //         .valid
		.in_0_ready     (u_gpo_2_s1_agent_rdata_fifo_src_ready),                   //         .ready
		.out_0_data     (avalon_st_adapter_025_out_0_data),                        //    out_0.data
		.out_0_valid    (avalon_st_adapter_025_out_0_valid),                       //         .valid
		.out_0_ready    (avalon_st_adapter_025_out_0_ready),                       //         .ready
		.out_0_error    (avalon_st_adapter_025_out_0_error)                        //         .error
	);

endmodule
